JPH07202453A - Circuit structure and production thereof - Google Patents

Circuit structure and production thereof

Info

Publication number
JPH07202453A
JPH07202453A JP103694A JP103694A JPH07202453A JP H07202453 A JPH07202453 A JP H07202453A JP 103694 A JP103694 A JP 103694A JP 103694 A JP103694 A JP 103694A JP H07202453 A JPH07202453 A JP H07202453A
Authority
JP
Japan
Prior art keywords
circuit structure
thermoplastic resin
electronic components
plate
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP103694A
Other languages
Japanese (ja)
Other versions
JP3549230B2 (en
Inventor
Takahiro Matsuo
隆広 松尾
Yasushi Mizuoka
靖司 水岡
Shinji Kadoriku
晋二 角陸
Toshiaki Sugimura
利明 杉村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP103694A priority Critical patent/JP3549230B2/en
Publication of JPH07202453A publication Critical patent/JPH07202453A/en
Application granted granted Critical
Publication of JP3549230B2 publication Critical patent/JP3549230B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Casings For Electric Apparatus (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

PURPOSE:To obtain a high quality small circuit structure by integrally molding a plurality of electronic devices of a thermoplastic resin while exposing the electrode of each device on the same plane thereby eliminating the need of circuit board. CONSTITUTION:Integrated circuit devices, chip resistors and other electronic devices 5 necessary for constituting a circuit are integrally molded of a thermoplastic resin 6, e.g. a liquid crystal polymer, with the electrode 7 of each device 5 being exposed on a same plane. The circuit structure is provided integrally, on one side thereof, with connectors 8 for connecting a part of wiring 9 of each device 5, the circuit structure is reduced in size because it requires no circuit board and contributes to reduce the size of the electronic device. Furthermore, since each device 5 is bonded firmly through the thermoplastic resin while establishing the electrical connection, wiring and connection with other objects are facilitated while enhancing the quality.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は回路基板を用いない回路
構成体およびその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit structure which does not use a circuit board and a method for manufacturing the same.

【0002】[0002]

【従来の技術】一般に電子機器における回路構成体とし
ては回路基板が用いられ、この回路基板上に多種の電子
部品が実装されて構成される。
2. Description of the Related Art Generally, a circuit board is used as a circuit structure in electronic equipment, and various electronic components are mounted on the circuit board.

【0003】図8は従来の回路構成体の一例を示し、図
中の1は絶縁性の基板2の面に回路網3を印刷して形成
してなる回路基板であり、前記回路網3におけるランド
部にはクリーム半田等の導電接着剤(図示せず)を付着
し、集積回路部品、チップ抵抗等の電子部品4の電極を
前記ランド部に接するように載せ、リフロー加熱等で前
記クリーム半田を溶かして電子部品4の電極と回路基板
1のランド部を接着するようにしている。
FIG. 8 shows an example of a conventional circuit structure. In FIG. 8, reference numeral 1 denotes a circuit board formed by printing a circuit network 3 on the surface of an insulating substrate 2. A conductive adhesive (not shown) such as cream solder is attached to the land portion, the electrode of the electronic component 4 such as an integrated circuit component or a chip resistor is placed in contact with the land portion, and the cream solder is applied by reflow heating or the like. Is melted to bond the electrode of the electronic component 4 and the land portion of the circuit board 1 to each other.

【0004】[0004]

【発明が解決しようとする課題】ところで電子機器にお
いては小型化が進められており、回路構成体もできるだ
け小さいものが要望されており、電子部品4の小型化は
もとより、回路基板1への実装密度を高めているが、電
子部品4の小型化、高実装密度化には限界があり、特に
所要の厚みと大きさをもつ回路基板1は回路構成体の小
型化を妨げる大きな要因となっている。また、電子機器
としては筺体も大きな体積を占め、その小型化への改善
の対象とされている。
By the way, miniaturization of electronic equipment is being promoted, and there is a demand for a circuit configuration body to be as small as possible. In addition to miniaturization of the electronic component 4, mounting on the circuit board 1 is required. Although the density is increased, there is a limit to the miniaturization and high packaging density of the electronic components 4, and the circuit board 1 having the required thickness and size is a major factor that hinders the miniaturization of the circuit structure. There is. In addition, as an electronic device, a housing occupies a large volume, and is targeted for improvement in downsizing.

【0005】また機能的には、回路構成体は前述のリフ
ロー半田付けにおいて、高温加熱されるため、各電子部
品を高温に耐える構成にしなければならず、回路基板に
は前記加熱によって湾曲したり、ひずみを起すなどして
実装する電子部品との接続不良を生じさせたりするとい
う問題があった。
Functionally, since the circuit component is heated to a high temperature during the reflow soldering described above, each electronic component must be configured to withstand the high temperature, and the circuit board may be bent by the heating. However, there is a problem that it causes a connection failure with an electronic component to be mounted by causing distortion.

【0006】本発明は前記従来の問題に留意し、回路基
板を不要として小型、かつ品質のよい回路構成体とその
製造方法を提供することを目的とする。
The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide a small-sized and high-quality circuit structure which does not require a circuit board and a manufacturing method thereof.

【0007】[0007]

【課題を解決するための手段】前記目的を達成するため
本発明は、複数の電子部品を熱可塑性樹脂でモールドし
て一体化するとともに、前記各電子部品の電極を同一平
面上に表出させた回路構成体の構成とする。
In order to achieve the above-mentioned object, the present invention is to mold a plurality of electronic components by molding with a thermoplastic resin to integrate them, and to expose the electrodes of each electronic component on the same plane. And the circuit structure.

【0008】また本発明は、プレート上に複数の電子部
品を、その各電極がプレート面に面接するように搭載
し、前記各電子部品上に熱可塑性のモールド材を被着し
て各電子部品をモールド一体化したのち、前記プレート
を離して回路構成体を製造する方法とする。
According to the present invention, a plurality of electronic components are mounted on a plate so that their electrodes are in contact with the plate surface, and a thermoplastic molding material is adhered on each of the electronic components so that each electronic component is mounted. Is integrated with the mold, and then the plate is separated to produce a circuit structure.

【0009】[0009]

【作用】上記構成の回路構成体は、回路基板として構成
されるために小型化され、そして各電極が面一に表出配
置されているので、回路網の印刷、あるいはワイヤ配線
が行いやすい。
The circuit structure having the above structure is miniaturized because it is configured as a circuit board, and the electrodes are arranged so as to be flush with each other. Therefore, it is easy to print a circuit network or wire wiring.

【0010】また、前記回路構成体の製造法では回路基
板を用いないことから、リフロー半田付における加熱工
程がなく、電子部品を熱損させるおそれがなく、しか
も、各回路部品の電極が面一にできるので、以後の配線
を容易にする。
Further, since the circuit board is not used in the method for manufacturing the circuit structure, there is no heating step in reflow soldering, there is no fear of heat loss of electronic parts, and the electrodes of each circuit part are flush with each other. Therefore, the subsequent wiring is facilitated.

【0011】[0011]

【実施例】以下本発明の一実施例の回路構成体を説明す
る。図1および図2に示すように、集積回路部品、チッ
プ抵抗その他回路構成に必要な各電子部品5は熱可塑性
樹脂6、たとえば液晶ポリマーによってモールドされて
一体化されており、各電子部品5の電極7は同一面上に
表出配設されている。前記回路構成体の一側にはコネク
タ8が一体に設けられ、そして各電子部品5の一部の配
線ワイヤ9は前記コネクタ8に接続された構成となって
いる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A circuit structure according to an embodiment of the present invention will be described below. As shown in FIGS. 1 and 2, integrated circuit components, chip resistors, and other electronic components 5 necessary for the circuit configuration are molded and integrated with a thermoplastic resin 6, for example, a liquid crystal polymer. The electrodes 7 are arranged so as to be exposed on the same surface. A connector 8 is integrally provided on one side of the circuit structure, and a part of the wiring wire 9 of each electronic component 5 is connected to the connector 8.

【0012】この構成の回路構成体は、回路基板がない
ために、その形状が小型化され、電子機器の小型化を助
成する。また、各電子部品5は、熱可塑性樹脂6によっ
てしっかりと位置固定され、また電気的接続も確立され
るので、配線、あるいは他の接続体への接続が容易であ
り、品質も向上する。
Since the circuit structure having this structure does not have a circuit board, the shape of the circuit structure is miniaturized, which helps miniaturize the electronic equipment. Further, since each electronic component 5 is firmly fixed in position by the thermoplastic resin 6 and the electrical connection is established, wiring or connection to another connecting body is easy and the quality is improved.

【0013】図3は本発明の他の実施例を示し、このも
のは各電子部品5をモールドした熱可塑性樹脂6の上に
二次成形により熱伝導性のよい放熱材料によって放熱層
10を形成している。
FIG. 3 shows another embodiment of the present invention, in which a heat dissipation layer 10 is formed on a thermoplastic resin 6 in which each electronic component 5 is molded by secondary molding using a heat dissipation material having good heat conductivity. is doing.

【0014】このものは前記実施例に加えて、回路構成
体の放熱特性を向上させることができ、放熱層10は成
形によって容易に形成できる。図4および図5は本発明
の回路構成体の他の放熱構成の例を示し、図4において
は前述の放熱層に代えて放熱板11を被着したものであ
り、また図5においては、同じく放熱層に代えて各電子
部品5に冷却フィン12を取りつけ、この冷却フィン1
2を外部に導出した構成としている。これらのものも放
熱層を設けたものと同様に放熱効果を上げることができ
るものであり、そして放熱板11あるいは冷却フィン1
2は熱可塑性樹脂6に確実に接着により、また包まれて
保持され、安定した放熱構成にすることができる。
In addition to the above-mentioned embodiment, this can improve the heat dissipation characteristics of the circuit structure, and the heat dissipation layer 10 can be easily formed by molding. 4 and 5 show another example of the heat dissipation structure of the circuit structure of the present invention. In FIG. 4, a heat dissipation plate 11 is attached instead of the above heat dissipation layer, and in FIG. Similarly, a cooling fin 12 is attached to each electronic component 5 in place of the heat dissipation layer.
2 is derived to the outside. Similar to those provided with a heat dissipation layer, these can enhance the heat dissipation effect, and the heat dissipation plate 11 or the cooling fin 1 can be used.
2 is securely adhered to the thermoplastic resin 6 and is also wrapped and held, so that a stable heat dissipation structure can be obtained.

【0015】図6も本発明の他の実施例を示し、このも
のは各電子部品5のモールド材が電子機器のケース13
よりなっている。この構成によれば、ケース13を利用
した回路構成体であるので、また、回路基板がないの
で、電子機器の小型化を一層に促進させ、特に部品点数
を減らすことができるので有用である。
FIG. 6 also shows another embodiment of the present invention in which the molding material of each electronic component 5 is a case 13 of an electronic device.
Has become According to this configuration, since the case 13 is a circuit structure body and there is no circuit board, it is possible to further promote the miniaturization of the electronic device and particularly reduce the number of parts, which is useful.

【0016】つぎに本発明の回路構成体の製造方法につ
いて説明する。まず図7(a)に示すように金属のプレ
ー14上に両面接着テープ15を貼りつけ、前記両面接
着テープ15の表出した面に、端面に電極を表出させた
各電子部品5を、その電極が接するように搭載する。つ
ぎに同図(b)に示すように熱可塑性樹脂6を前記各電
子部品5の上全体にわたりモールド成型する。さらに同
図(c)に示すように、モールドした熱可塑性樹脂6の
上に、金属粉等を混入した熱伝導性のよい樹脂よりなる
放熱層10を二次成形によって形成する。そして最終工
程として同図(d)のように両面接着テープ15をプレ
ート14および電子部品5の電極側の面よりはずし、独
立した回路構成体を製造する。
Next, a method of manufacturing the circuit structure of the present invention will be described. First, as shown in FIG. 7 (a), a double-sided adhesive tape 15 is attached onto a metal plate 14, and the electronic parts 5 having electrodes exposed on their end faces are attached to the exposed surface of the double-sided adhesive tape 15. Mount so that the electrodes are in contact. Next, as shown in FIG. 2B, the thermoplastic resin 6 is molded over the entire electronic components 5. Further, as shown in FIG. 3C, a heat dissipation layer 10 made of a resin having good thermal conductivity mixed with metal powder or the like is formed on the molded thermoplastic resin 6 by secondary molding. Then, as the final step, the double-sided adhesive tape 15 is removed from the plate 14 and the electrode-side surface of the electronic component 5, as shown in FIG.

【0017】この製造方法では、回路基板を用いないた
め、電子部品5の回路基板への実装工程がなく、いわゆ
るモールド構成にあるので製造が容易であり、また、電
子部品5を固定化するためのリフロー半田付も必要がな
いので、各電子部品5は大きな耐熱性を要求されなく、
もちろんその熱損傷がない。
In this manufacturing method, since the circuit board is not used, there is no step of mounting the electronic component 5 on the circuit board, and the so-called molded structure facilitates manufacturing, and the electronic component 5 is fixed. Since no reflow soldering is required, each electronic component 5 is not required to have large heat resistance,
Of course there is no heat damage.

【0018】なお、かくして得られた回路構成体は、そ
の電極に、印刷配線あるいはワイヤ配線を施して使用に
供せられる。また、モールド材である熱可塑性樹脂は液
晶ポリマー以外のものであってもよく、要は、電子部品
を封止する機能をもつものであればよい。
The circuit structure thus obtained is provided with printed wiring or wire wiring on its electrodes for use. Further, the thermoplastic resin as the molding material may be other than the liquid crystal polymer, and the point is that the thermoplastic resin has a function of sealing the electronic component.

【0019】[0019]

【発明の効果】前記実施例の説明より明らかなように、
本発明は回路基板を用いなく、各電子部品をモールド成
型し、かつその各電極を同一面上に表出配置した構成の
回路構成体であるので、回路構成体として小型化でき、
電子機器の小型化に寄与する。また、本発明はプレート
上に電子部品を、その各電極がプレートに接するように
してモールド成型し、前記各電子部品を一体化する製造
法であるので、各電子部品の一体化が容易であり、ま
た、その固定化にリフロー等の加熱が必要でなく、各電
子部品は熱損することがない。
As is clear from the description of the above embodiment,
Since the present invention is a circuit structure having a configuration in which each electronic component is molded without using a circuit board, and each electrode thereof is exposed and arranged on the same surface, the circuit structure can be miniaturized,
Contributes to miniaturization of electronic devices. Further, the present invention is a manufacturing method in which the electronic components are molded on the plate so that the respective electrodes are in contact with the plate, and the respective electronic components are integrated, so that the integration of the electronic components is easy. In addition, heating such as reflow is not necessary for fixing the electronic components, and each electronic component is not damaged by heat.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の回路構成体の斜視図FIG. 1 is a perspective view of a circuit structure according to an embodiment of the present invention.

【図2】同回路構成体の断面図FIG. 2 is a sectional view of the same circuit structure.

【図3】本発明の他の実施例の回路構成体の断面図FIG. 3 is a sectional view of a circuit structure according to another embodiment of the present invention.

【図4】本発明の他の実施例の回路構成体の断面図FIG. 4 is a sectional view of a circuit structure according to another embodiment of the present invention.

【図5】本発明の他の実施例の回路構成体の断面図FIG. 5 is a sectional view of a circuit structure according to another embodiment of the present invention.

【図6】本発明の他の実施例の回路構成体の断面図FIG. 6 is a sectional view of a circuit structure according to another embodiment of the present invention.

【図7】本発明の実施例の回路構成体の製造工程図FIG. 7 is a manufacturing process diagram of a circuit structure according to an embodiment of the present invention.

【図8】従来の回路構成体の斜視図FIG. 8 is a perspective view of a conventional circuit structure.

【符号の説明】[Explanation of symbols]

5 電子部品 6 熱可塑性樹脂 7 電極 8 コネクタ 9 ワイヤ 10 放熱層 5 electronic parts 6 thermoplastic resin 7 electrode 8 connector 9 wire 10 heat dissipation layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 杉村 利明 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshiaki Sugimura 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 複数の電子部品を熱可塑性樹脂でモール
ドして一体化するとともに、前記各電子部品の電極を同
一平面上に表出配置した回路構成体。
1. A circuit configuration body in which a plurality of electronic components are molded by a thermoplastic resin to be integrated with each other, and electrodes of the respective electronic components are exposed and arranged on the same plane.
【請求項2】 モールド熱可塑性樹脂の上に放熱材料よ
りなる放熱層を形成した請求項1記載の回路構成体。
2. The circuit structure according to claim 1, wherein a heat dissipation layer made of a heat dissipation material is formed on the molded thermoplastic resin.
【請求項3】 コネクタをモールドして一体化した請求
項1または2記載の回路構成体。
3. The circuit structure according to claim 1, wherein the connector is molded and integrated.
【請求項4】 モールド熱可塑性樹脂の上に放熱板を接
合した請求項1記載の回路構成体。
4. The circuit structure according to claim 1, wherein a heat dissipation plate is bonded onto the molded thermoplastic resin.
【請求項5】 電子部品に冷却フィンを設け、前記冷却
フィンをモールド熱可塑性樹脂より表出させた請求項1
記載の回路構成体。
5. The electronic component is provided with a cooling fin, and the cooling fin is exposed from a mold thermoplastic resin.
The described circuit structure.
【請求項6】 モールド熱可塑性樹脂がケースを形成し
た請求項1記載の回路構成体。
6. The circuit structure according to claim 1, wherein the molded thermoplastic resin forms a case.
【請求項7】 プレート上に複数の電子部品を、その各
電極がプレート面に面接するように搭載し、前記各電子
部品上に熱可塑性のモールド材を被着して各電子部品を
モールド一体化したのち、前記プレートを分離する回路
構成体の製造方法。
7. A plurality of electronic components are mounted on a plate such that their electrodes are in contact with the surface of the plate, and a thermoplastic molding material is adhered to each of the electronic components to integrally mold the electronic components. A method of manufacturing a circuit structure, wherein the plate is separated and then the plate is separated.
【請求項8】 プレート上に両面接着テープを接合し、
前記両面接着テープ上に複数の電子部品を、その各電極
が両面接着テープ面に面接するように搭載し、前記各電
子部品上に熱可塑性のモールド材を被着して各電子部品
をモールド一体化したのち、両面接着剤をプレートおよ
び各電子部品の電極側の面より剥離する回路構成体の製
造方法。
8. A double-sided adhesive tape is bonded onto the plate,
A plurality of electronic components are mounted on the double-sided adhesive tape so that their electrodes are in contact with the surfaces of the double-sided adhesive tape, and a thermoplastic molding material is adhered onto the respective electronic components to integrally mold the electronic components. A method of manufacturing a circuit structure in which the double-sided adhesive is peeled off from the surface of the plate and the electrode side of each electronic component.
【請求項9】 熱可塑性モールド材の上に熱伝導性のよ
い成形材を二次成形して放熱層を形成する請求項7また
は8記載の回路構成体の製造方法。
9. The method for manufacturing a circuit structure according to claim 7, wherein a heat radiation layer is formed by secondarily molding a molding material having good thermal conductivity on the thermoplastic molding material.
JP103694A 1994-01-11 1994-01-11 Circuit structure and manufacturing method thereof Expired - Fee Related JP3549230B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP103694A JP3549230B2 (en) 1994-01-11 1994-01-11 Circuit structure and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP103694A JP3549230B2 (en) 1994-01-11 1994-01-11 Circuit structure and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH07202453A true JPH07202453A (en) 1995-08-04
JP3549230B2 JP3549230B2 (en) 2004-08-04

Family

ID=11490343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP103694A Expired - Fee Related JP3549230B2 (en) 1994-01-11 1994-01-11 Circuit structure and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP3549230B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009224707A (en) * 2008-03-18 2009-10-01 Hitachi Ltd Heat dissipation structure of heat generating component, control unit of electric power steering device, and manufacturing method of heat generating component assembly
JP2009540590A (en) * 2006-06-13 2009-11-19 バレオ・エチユード・エレクトロニク HOLDER FOR ELECTRICAL COMPONENT AND ELECTRIC DEVICE INCLUDING THE HOLDER AND COMPONENT
JP2016076613A (en) * 2014-10-07 2016-05-12 株式会社デンソー Electronic device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009540590A (en) * 2006-06-13 2009-11-19 バレオ・エチユード・エレクトロニク HOLDER FOR ELECTRICAL COMPONENT AND ELECTRIC DEVICE INCLUDING THE HOLDER AND COMPONENT
JP2009224707A (en) * 2008-03-18 2009-10-01 Hitachi Ltd Heat dissipation structure of heat generating component, control unit of electric power steering device, and manufacturing method of heat generating component assembly
JP2016076613A (en) * 2014-10-07 2016-05-12 株式会社デンソー Electronic device

Also Published As

Publication number Publication date
JP3549230B2 (en) 2004-08-04

Similar Documents

Publication Publication Date Title
EP0065425B1 (en) Hybrid integrated circuit component and printed circuit board mounting said component
JPH11163501A (en) Method for mounting electronic part, and electronic circuit device manufactured there by
JPH04171994A (en) Printed-circuit board for mounting of large-power semiconductor chip; and driving component using same
JPH07202453A (en) Circuit structure and production thereof
US5739743A (en) Asymmetric resistor terminal
JPH05327249A (en) Electronic circuit module and manufacture thereof
JP2003304039A (en) Electric circuit board
US5330825A (en) Printed circuit substrate with projected electrode and connection method
JPH10321987A (en) Printed wiring board and manufacture thereof
JP2816084B2 (en) Solder coating method, semiconductor device manufacturing method, and squeegee
JPH0458189B2 (en)
JPH0224395B2 (en)
JP2879503B2 (en) Surface mount type electronic circuit device
JPH0536300Y2 (en)
JP2000299544A (en) Connection structure for rigid circuit board
JPH0528917B2 (en)
JP2003142798A (en) Circuit board and manufacturing method thereof
JP2562797Y2 (en) Wiring board
JPH0639483Y2 (en) Hybrid integrated circuit
JP2806343B2 (en) Multi-chip module and its chip carrier
JP2969977B2 (en) Multiple chip parts
JPH0865013A (en) Concentrated constant type isolator
JPH0737631A (en) Lead terminal for hybrid integrated circuit
JPS63219187A (en) Hybrid integrated circuit
JPH10173319A (en) Printed wiring board and its mounting method

Legal Events

Date Code Title Description
TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20040323

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20040420

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080430

Year of fee payment: 4

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090430

Year of fee payment: 5

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100430

Year of fee payment: 6

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110430

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120430

Year of fee payment: 8

LAPS Cancellation because of no payment of annual fees