JP2562797Y2 - Wiring board - Google Patents

Wiring board

Info

Publication number
JP2562797Y2
JP2562797Y2 JP1992025475U JP2547592U JP2562797Y2 JP 2562797 Y2 JP2562797 Y2 JP 2562797Y2 JP 1992025475 U JP1992025475 U JP 1992025475U JP 2547592 U JP2547592 U JP 2547592U JP 2562797 Y2 JP2562797 Y2 JP 2562797Y2
Authority
JP
Japan
Prior art keywords
substrate
temperature
wiring board
side electrode
conductive resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1992025475U
Other languages
Japanese (ja)
Other versions
JPH0577967U (en
Inventor
真史 後藤
喜一 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP1992025475U priority Critical patent/JP2562797Y2/en
Publication of JPH0577967U publication Critical patent/JPH0577967U/en
Application granted granted Critical
Publication of JP2562797Y2 publication Critical patent/JP2562797Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【考案の詳細な説明】[Detailed description of the invention]

【0001】[0001]

【産業上の利用分野】本考案は、配線基板に係り、特に
側面電極の構成に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board, and more particularly to a structure of a side electrode.

【0002】[0002]

【従来の技術および考案が解決しようとする課題】厚膜
機能素子を表面に一体に形成するか、あるいは素子を搭
載した厚膜基板、あるいは内部に素子や導体を形成した
多層基板等の配線基板において、基板上の導体間の接続
ないしは外部回路への接続のために側面に設けるはんだ
付け可能な側面電極として、従来、一般に銀−パラジウ
ム電極が用いられている。この銀−パラジウム電極は、
その粉末をバインダに混入したものを配線基板の側面に
塗布した後、600℃以上で焼成することによって形成
されている。
2. Description of the Related Art A wiring substrate such as a thick film substrate on which a thick film functional element is integrally formed on a surface or a multilayer film substrate on which an element or a conductor is formed, Conventionally, a silver-palladium electrode is generally used as a solderable side electrode provided on a side surface for connection between conductors on a substrate or connection to an external circuit. This silver-palladium electrode
It is formed by applying the powder mixed in a binder to the side surface of the wiring board and then firing at 600 ° C. or higher.

【0003】このように、従来は、側面電極を高温で焼
成することにより形成しているため、焼成温度またはは
んだ付け温度の熱を受けることによって特性が変化する
厚膜機能素子(例えば抵抗値が調整された抵抗体)や素
子を搭載した配線基板においては、側面電極焼成時にこ
れらの素子の特性が変化するか、さらには破損するた
め、側面電極形成のための焼成時にこれらの素子を配線
基板上に設けておくことはできない。このため、従来
は、図3(A)に示すように、多数個どりの基板1を含
んだ基板素材2上に導体パターンを形成後、各基板1ご
とに分割し、側面電極3を形成し、自動搭載機による基
板1上への素子4の搭載を行うという工程で配線基板1
を製造していた。
As described above, since the side electrodes are conventionally formed by firing at a high temperature, a thick-film functional element (for example, having a resistance value of which the characteristics are changed by receiving heat at the firing temperature or the soldering temperature). In a wiring board on which the adjusted resistors) and elements are mounted, the characteristics of these elements change or are damaged when the side electrodes are baked. It cannot be placed on top. For this reason, conventionally, as shown in FIG. 3A, after forming a conductor pattern on a substrate material 2 including a large number of substrates 1, the substrate is divided for each substrate 1 to form a side electrode 3. In the process of mounting the element 4 on the substrate 1 by the automatic mounting machine,
Had been manufactured.

【0004】このように、従来は側面電極3を高温で焼
成する必要があるので、焼成温度で特性の変化する素子
4の配線基板1への搭載は、側面電極3を形成した後に
限られる。このため、各基板1毎に素子4の形成や搭載
を行う必要があり、製造の能率向上を阻害するという問
題点があった。
As described above, conventionally, it is necessary to fire the side electrode 3 at a high temperature. Therefore, the mounting of the element 4 whose characteristics change at the firing temperature on the wiring board 1 is limited after the side electrode 3 is formed. For this reason, it is necessary to form and mount the element 4 for each substrate 1, which hinders improvement in manufacturing efficiency.

【0005】また、銀−パラジウム電極は、焼成による
形成後にメッキを施す必要があり、メッキ液が側面電極
3や他の導体等の腐食を起こすおそれがあるという問題
点があった。
Further, the silver-palladium electrode needs to be plated after being formed by firing, and there is a problem that the plating solution may cause corrosion of the side electrode 3 and other conductors.

【0006】本考案は、上記問題点に鑑み、素子を搭載
したままで側面電極の形成が可能となって製造の能率向
上が達成でき、かつメッキ不要となる側面電極を備えた
配線基板を提供することを目的とする。
SUMMARY OF THE INVENTION In view of the above problems, the present invention provides a wiring board having a side electrode which can form a side electrode while the element is mounted, thereby improving manufacturing efficiency, and does not require plating. The purpose is to do.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するた
め、本考案は、導体パターンを形成したセラミック基板
上に、該基板に一体に形成された厚膜機能素子または搭
載素子のうち少なくともいずれか一方の素子を設けると
共に、該基板の側面に、半田付け温度以下の温度で加熱
することにより硬化させて形成される導電性樹脂でなる
電極を固着したことを特徴とする(請求項1)。また本
考案は、導体パターンを形成したセラミック基板上に搭
載する素子を、導体パターンに半田付け温度以下の温度
で加熱することにより硬化される導電性樹脂により固定
し、該基板の側面に、半田付け温度以下の温度で加熱す
ることにより硬化して形成される導電性樹脂でなる電極
を固着したことを特徴とする(請求項2)。また基板と
してセラミック基板以外に多層基板を用いることを特徴
とする(請求項3)。
In order to achieve the above-mentioned object, the present invention provides a ceramic substrate on which a conductive pattern is formed, wherein at least one of a thick-film functional element and a mounting element formed integrally with the substrate. One element is provided and the side of the board is heated at a temperature lower than the soldering temperature.
In this case , an electrode made of a conductive resin formed by curing is fixed. In addition, the present invention provides a method for mounting an element mounted on a ceramic substrate on which a conductor pattern is formed at a temperature lower than the soldering temperature of the conductor pattern.
Is fixed by a conductive resin cured by heating at a temperature lower than the soldering temperature on the side surface of the substrate .
An electrode made of a conductive resin formed by being cured by the fixing is fixed (claim 2). Also, a multilayer substrate is used as the substrate other than the ceramic substrate (claim 3).

【0008】[0008]

【作用】請求項1においては、側面電極として、半田付
け温度以下の温度で加熱することにより硬化させて形成
される導電性樹脂材料を使用しているので、配線基板に
搭載する素子あるいは一体形成素子の特性が変化しない
低温で配線基板に側面電極を形成できる。したがって、
配線基板にこれらの素子を設けたままで側面電極を形成
できる。側面電極は、基板上の導体間の接続あるいはマ
ザー基板へのはんだ付け電極として用いられる。請求項
2においては、はんだより低い温度で素子を固定できる
ので、より耐熱温度の低い素子の搭載が可能となる。請
求項3においては、基板として多層基板を用いることに
より、高密度基板が実現される。
According to the first aspect, the side electrode is soldered.
Cured by heating at a temperature below the casting temperature to form
Since the conductive resin material used is used, the side electrodes can be formed on the wiring board at a low temperature at which the characteristics of the element mounted on the wiring board or the integrally formed element do not change. Therefore,
The side electrodes can be formed with these elements provided on the wiring board. The side electrode is used as a connection between conductors on a substrate or as a soldering electrode to a mother substrate. According to the second aspect, since the element can be fixed at a temperature lower than that of the solder, an element having a lower heat-resistant temperature can be mounted. According to the third aspect, a high-density substrate is realized by using a multilayer substrate as the substrate.

【0009】[0009]

【実施例】図1(A)は本考案による配線基板の一実施
例を示す斜視図、(B)はその配線基板の側面電極部を
示す断面図、図2(A)、(B)は搭載素子の電極固定
構造例を示す断面図である。1はアルミナ等のセラミッ
クの表裏面に配線としての導体パターンを形成した配線
基板、4はチップ部品でなる搭載素子、10は厚膜によ
り形成され、抵抗値が調整された抵抗体である。これら
の少なくとも一部は焼成温度または低温はんだ以上で特
性が変化するものである。5は本考案により設けられた
側面電極であり、該側面電極ははんだ付け温度以下で硬
化することが可能な導電性樹脂材料を用いて形成され、
樹脂に銀粉あるいは銀層で覆った銅粉を混入することに
より、はんだ付け可能としたものである。この側面電極
5は、前記素子4を搭載した後に流動状態で配線基板1
に塗布し、はんだ付け温度以下の温度で加熱することに
より硬化させて形成される。
1A is a perspective view showing one embodiment of a wiring board according to the present invention, FIG. 1B is a cross-sectional view showing a side electrode portion of the wiring board, and FIGS. It is sectional drawing which shows the electrode fixing structure example of a mounting element. Reference numeral 1 denotes a wiring board in which a conductor pattern as wiring is formed on the front and back surfaces of ceramic such as alumina, 4 denotes a mounting element formed of a chip component, and 10 denotes a resistor formed of a thick film and having a resistance value adjusted. At least some of them change their characteristics at the firing temperature or at a temperature higher than the low-temperature solder. 5 is a side electrode provided by the present invention, the side electrode is formed using a conductive resin material that can be cured at a soldering temperature or less,
The soldering is enabled by mixing silver powder or copper powder covered with a silver layer into the resin. The side electrode 5 is mounted on the wiring board 1 in a flowing state after the element 4 is mounted.
And cured by heating at a temperature lower than the soldering temperature.

【0010】図1(B)に示すように、該側面電極5
は、配線基板1の表裏面に形成した導体6、7どうしを
電気的に接続する役目と、該配線基板1を搭載するマザ
ー基板8上の導体9にはんだ11により接続する役目の
少なくともいずれかを果たすために設けられる。
[0010] As shown in FIG.
Is a function of electrically connecting the conductors 6 and 7 formed on the front and back surfaces of the wiring board 1 and / or a function of connecting the conductors 9 on the mother board 8 on which the wiring board 1 is mounted by solder 11. It is provided to fulfill.

【0011】図2(A)は内部に積層構造で導体パター
ン14を形成した多層基板1Aを配線基板に用いた例で
あり、素子4はその端子12を多層基板1Aの面上の導
体6にはんだ11により固定される。
FIG. 2A shows an example in which a multilayer substrate 1A in which a conductor pattern 14 having a laminated structure is formed is used as a wiring substrate, and the element 4 has its terminals 12 connected to the conductors 6 on the surface of the multilayer substrate 1A. It is fixed by the solder 11.

【0012】このように、側面電極5としてはんだ付け
可能な導電性樹脂材料を用いることにより、素子4を搭
載したままで側面電極5の形成が可能となる。したがっ
て、図3(B)に示すように、多数枚の基板1を含んだ
基板素材2上に導体パターンを形成後、各基板1ごとに
分割することなく、自動搭載機による基板1上への素子
4の搭載を行い、その後各配線基板1ごとに分割し、側
面電極5を形成するという製造工程を採用しうる。この
ような製造工程を採用することにより、素子4の搭載が
多数枚分の素材2についてまとめて能率良く行われる。
また、従来の側面電極の形成温度では不可能であった厚
膜素子10を予め形成しておくことができる。また、従
来の銀−パラジウム側面電極の場合のようにメッキする
必要はない。
As described above, by using a solderable conductive resin material for the side electrode 5, the side electrode 5 can be formed while the element 4 is mounted. Therefore, as shown in FIG. 3 (B), after a conductor pattern is formed on a substrate material 2 including a large number of substrates 1, the substrate 1 is not automatically divided into individual substrates 1 but is mounted on the substrate 1 by an automatic mounting machine. It is possible to adopt a manufacturing process in which the element 4 is mounted and then divided for each wiring board 1 to form the side electrode 5. By adopting such a manufacturing process, the mounting of the elements 4 can be efficiently performed collectively for many materials 2.
Further, the thick film element 10 that cannot be formed at the conventional forming temperature of the side electrode can be formed in advance. Also, there is no need to plate as in the case of conventional silver-palladium side electrodes.

【0013】図2(B)は導電性樹脂材料15により素
子4を基板1上の導体6に固定した例であり、本例によ
れば、はんだより低い温度で素子4を固定できるので、
より耐熱温度の低い素子の搭載が可能となる。また、導
電性樹脂材料15として側面電極5を構成する材料と同
じ硬化温度のものを使用すれば、素子4の固定と側面電
極5の形成を同時に行える。
FIG. 2B shows an example in which the element 4 is fixed to the conductor 6 on the substrate 1 by the conductive resin material 15. According to this example, the element 4 can be fixed at a lower temperature than solder.
An element having a lower heat-resistant temperature can be mounted. When the conductive resin material 15 has the same curing temperature as the material constituting the side electrode 5, the fixing of the element 4 and the formation of the side electrode 5 can be performed simultaneously.

【0014】[0014]

【考案の効果】請求項1によれば、側面電極として、
田付け温度以下の温度で加熱することにより硬化させて
形成される導電性樹脂材料を用いたので、多数の基板を
含む基板素材の状態で基板上への素子の形成あるいは搭
載が可能となり、素子の形成あるいは搭載が能率良く行
え、その結果、価格低減に寄与できる。また、側面電極
へのメッキが不要となるので、メッキ液による側面電極
自体の腐食や他の導体等の腐食が起きるおそれがない。
請求項2によれば、請求項1の効果に加え、はんだより
低い温度で搭載素子を固定できるので、より耐熱温度の
低い素子の搭載が可能となり、適用範囲が拡大される
いう効果が得られる。また、導電性樹脂材料として側面
電極を構成する材料と同じ硬化温度のものを使用すれ
ば、搭載素子の固定と側面電極の形成を同時に行え、能
率向上が図れる。請求項3によれば、請求項1または2
の効果に加え、基板として多層基板を用いたことによ
り、高密度基板が実現できるという効果が得られる
According to the first aspect of the present invention, a half- side electrode is provided.
Cured by heating at a temperature below the dipping temperature
Since the formed conductive resin material is used, it is possible to form or mount the element on the substrate in the state of the substrate material including many substrates, and it is possible to efficiently form or mount the element, thereby reducing the price. Can contribute to In addition, since plating on the side electrodes is not required, there is no possibility that corrosion of the side electrodes themselves or corrosion of other conductors or the like due to the plating solution will occur.
According to claim 2, in addition to the effects of claim 1, it is possible to fix the mounting element at a lower soldering temperature enables more mounting of low heat temperature device, the application range is expanded
The above effect can be obtained. If a conductive resin material having the same curing temperature as the material constituting the side electrode is used, the mounting element can be fixed and the side electrode can be formed at the same time, and the efficiency can be improved. According to claim 3, claim 1 or 2
In addition to the effects described above, the effect that a high-density substrate can be realized is obtained by using a multilayer substrate as the substrate.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(A)は本考案による配線基板の一実施例を示
す斜視図、(B)はその側面電極部を示す断面図であ
る。
1A is a perspective view showing an embodiment of a wiring board according to the present invention, and FIG. 1B is a cross-sectional view showing a side electrode portion thereof.

【図2】(A)、(B)はそれぞれ本考案の素子搭載構
造例を示す断面図である。
FIGS. 2A and 2B are cross-sectional views each showing an example of an element mounting structure of the present invention.

【図3】(A)は従来の配線基板の製造工程図、(B)
は本実施例の配線基板の製造工程図である。
FIG. 3A is a manufacturing process diagram of a conventional wiring board, and FIG.
6 is a manufacturing process diagram of the wiring board of the present embodiment.

【符号の説明】[Explanation of symbols]

1 配線基板 1A 多層基板 2 基板素材 4 素子 5 側面電極 6、7、9 導体 8 マザー基板 10 厚膜素子 11 はんだ 12 端子 14 導体パターン 15 導電性樹脂材料 DESCRIPTION OF SYMBOLS 1 Wiring board 1A Multilayer board 2 Substrate material 4 Element 5 Side electrode 6, 7, 9 Conductor 8 Mother board 10 Thick film element 11 Solder 12 Terminal 14 Conductor pattern 15 Conductive resin material

Claims (3)

(57)【実用新案登録請求の範囲】(57) [Scope of request for utility model registration] 【請求項1】導体パターンを形成したセラミック基板上
に、該基板に一体に形成された厚膜機能素子または搭載
素子のうち少なくともいずれか一方の素子を設けると共
に、該基板の側面に、半田付け温度以下の温度で加熱す
ることにより硬化して形成される導電性樹脂でなる電極
を固着したことを特徴とする配線基板。
1. A ceramic substrate on which a conductive pattern is formed, at least one of a thick film functional element and a mounting element formed integrally with the substrate are provided and soldered to a side surface of the substrate. Heat below the temperature
A wiring substrate, wherein an electrode made of a conductive resin formed by being cured by the fixing is fixed.
【請求項2】導体パターンを形成したセラミック基板上
に搭載する素子を、導体パターンに半田付け温度以下の
温度で加熱することにより硬化される導電性樹脂により
固定し、該基板の側面に、半田付け温度以下の温度で加
熱することにより硬化して形成される導電性樹脂でなる
電極を固着したことを特徴とする配線基板。
2. An element mounted on a ceramic substrate having a conductor pattern formed thereon is soldered to the conductor pattern at a temperature lower than a soldering temperature.
It is fixed with a conductive resin that is cured by heating at a temperature, and is applied to the side surface of the substrate at a temperature lower than the soldering temperature.
A wiring substrate, wherein an electrode made of a conductive resin formed by being cured by heating is fixed.
【請求項3】請求項1または2において、前記基板が多
層基板でなることを特徴とする配線基板。
3. The wiring board according to claim 1, wherein said board is a multilayer board.
JP1992025475U 1992-03-25 1992-03-25 Wiring board Expired - Fee Related JP2562797Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1992025475U JP2562797Y2 (en) 1992-03-25 1992-03-25 Wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1992025475U JP2562797Y2 (en) 1992-03-25 1992-03-25 Wiring board

Publications (2)

Publication Number Publication Date
JPH0577967U JPH0577967U (en) 1993-10-22
JP2562797Y2 true JP2562797Y2 (en) 1998-02-16

Family

ID=12167071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1992025475U Expired - Fee Related JP2562797Y2 (en) 1992-03-25 1992-03-25 Wiring board

Country Status (1)

Country Link
JP (1) JP2562797Y2 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4898362A (en) * 1972-03-29 1973-12-13
JPS5643746A (en) * 1979-09-18 1981-04-22 Tdk Corp Lead-less hybrid integrated circuit parts
JPS61207068U (en) * 1985-06-14 1986-12-27
JPS63273393A (en) * 1987-04-30 1988-11-10 Nec Corp Hybrid integrated circuit device
JPH0537111A (en) * 1991-07-31 1993-02-12 Marantz Japan Inc Mounting structure of hybrid ic

Also Published As

Publication number Publication date
JPH0577967U (en) 1993-10-22

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