JP2001068615A - Power amplifier module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power amplifier module of superior heat release characteristics by simple constitution. SOLUTION: This module includes substrates 1, a semiconductor chip 3 and a metal block 5. The substrate 1 has a clipped part 7 in the surface thereof. The metal block 5 is placed inside the clipped part 7 of the substrate 1. The semiconductor chip 3 is mounted on the surface of the metal block 5. Thereby a power amplifier module of superior heat release characteristics is provided by a simple constitution. And a miniature power amplifier module of superior heat release characteristics is provided. Further, the power amplifier module of superior heat release characteristics which is mounted and assembled with ease is provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power amplification module used for a communication device such as a mobile phone.

[0002]

2. Description of the Related Art In recent years, with the spread of communication devices such as mobile phones, demand for microwave band power amplification modules has been increasing. This type of power amplification module is described in, for example, National Technical Report Vol. 42 No. 1 Feb. 1
As described in 966, pp. 101-109, it has a modularized structure in which a semiconductor chip for power amplification and passive circuit components are mounted on a substrate. As described above, since this type of power amplification module includes the semiconductor chip for power amplification and the high-frequency power amplification circuit using the semiconductor and the chip, the power consumption is the highest among the components used in the communication device. It is a component with many parts, and heat dissipation is a very important technical improvement item.

Specifically, a semiconductor chip has several hundred mA.
Since a current of about 1.5 A flows from the device, heat is generated. If the generated heat is not dissipated by any heat dissipating means, the channel temperature of the semiconductor will increase, the on-resistance will increase, leading to thermal runaway, and eventually the semiconductor chip will be damaged.

[0004] As means for improving the heat dissipation in the power amplification module, the above-mentioned document discloses a method using aluminum nitride having good heat conductivity as a substrate, a method in which a cavity is provided in an alumina substrate, and a surface of the substrate is provided in the cavity. A method for mounting a semiconductor chip is disclosed above.

However, the method using an aluminum nitride substrate as the substrate is described in
There is a disadvantage that the substrate price is high.

A method of providing a cavity in an alumina substrate and mounting a semiconductor chip on the surface of the substrate in the cavity is to solve the difficulty of the method using an aluminum nitride substrate.

However, since the alumina substrate is, after all, a dielectric material, the heat dissipation is far from metal such as copper. In order to compensate for this, various measures have been taken to reduce the thickness of the dielectric layer as much as possible.In this case, not only is the structure of the substrate complicated, but also the material and structure of the substrate are limited. Also. In addition, due to limitations on the substrate material and structure, as the miniaturization of the shape progresses, the heat dissipation performance of the semiconductor chip also becomes limited.

Further, since a step for wire bonding mounting must be provided in the cavity, the structure of the substrate becomes complicated. Furthermore, since it is necessary to perform the bonding operation of the semiconductor chip in the cavity, there arises a problem that the mounting workability is poor.

As another means for improving heat dissipation, a structure in which a via hole (heat dissipation through-hole) is provided on a substrate supporting a semiconductor chip in a cavity is known, but sufficient heat dissipation cannot be secured.

[0010]

SUMMARY OF THE INVENTION An object of the present invention is to provide a power amplifier module having a simple structure and excellent heat dissipation.

Another object of the present invention is to provide a power amplifier module having a small shape and excellent heat dissipation.

Still another object of the present invention is to provide a power amplifier module which is easy to mount and assemble and has excellent heat dissipation.

[0013]

In order to solve the above-mentioned problems, a power amplification module according to the present invention includes at least one substrate, a semiconductor chip, and a metal block.

[0014] The substrate has a cutout in a plane, and the metal block is disposed in the cutout of the substrate. The semiconductor chip is mounted on a surface of the metal block.

As described above, in the power amplification module according to the present invention, since the semiconductor chip is mounted on the surface of the metal block, heat generated in the semiconductor chip can be radiated through the metal block. The metal block can be formed using a metal material having a significantly higher thermal conductivity than alumina or the like. For this reason, a power amplifying module with extremely excellent heat dissipation can be obtained.

Moreover, the substrate has a cutout in the plane, and the metal block is disposed in the cutout of the substrate. For this reason, it is possible to obtain a power amplification module having a simple configuration and excellent heat dissipation. In addition, since the metal block is arranged in the cutout portion of the substrate and the semiconductor chip is mounted on the surface of the metal block, mounting and assembly is easy.

Furthermore, it is easy to align the surface of the metal block with the surface of the substrate, and the bonding operation of the semiconductor chip can be performed on a surface having no step, so that the mounting operation becomes extremely easy.

As a specific mode, the substrate may have a dielectric layer on the side facing the surface of the metal block. In this case, the dielectric layer has a conductor pattern on at least one surface side, and the conductor pattern is configured to be thicker than the dielectric layer. According to this structure, the effect of heat dissipation by the dielectric layer can be minimized and the thickness can be reduced.

In still another embodiment, the apparatus includes a metal case,
The metal case may be thermally coupled to the metal block on a side facing the surface of the metal block.
In this case, a heat radiator including a metal case is formed, and the heat radiation characteristics can be further improved.

Other objects, configurations and advantages of the present invention will be described more specifically with reference to the accompanying drawings which are embodiments. The figures are merely examples.

[0021]

FIG. 1 is an electric circuit diagram of a power amplification module according to the present invention. The electric circuit shown in FIG. 1 is well known as a microwave band power amplification module in various communication devices including a mobile phone. However, FIG. 1 is merely an example, and it goes without saying that the power amplification module according to the present invention is not limited to the circuit shown in FIG.

In FIG. 1, FET1 and FET2 constitute a two-stage power amplifier circuit. The input signal supplied from the input terminal Pin is supplied to the gate of the FET 1 through the capacitor C2 and the impedance element Z1. The capacitor C2 and the impedance element Z1 constitute a matching circuit that matches the impedance (50Ω) of the incoming signal line with the impedance. The signal power-amplified by the FET 1 includes an impedance element Z2, a capacitor C
5, is supplied to the gate of FET2 through an impedance matching circuit composed of a capacitor C6 and an impedance element Z3. The signal power-amplified by the FET 2 is guided to an output terminal Pout through an impedance control circuit including an impedance element Z4, a capacitor C9, and an impedance element C10, and is output from the output terminal Pout.

A circuit composed of resistors R1 to R3 and capacitors C1 and C3 is connected to the gate of FET1.
One end of each of the resistors R1 and R2 is connected to each other, the other end of the resistor R1 is connected to the first DC power supply Vgg, and the other end of the resistor R2 is grounded. The resistor R3 includes a resistor R1 and a resistor R2.
And the gate of FET1. These resistors R1 to R3 constitute a bias circuit for FET1.

One end of the capacitor C1 is connected to the first power supply terminal V
gg, and the other end is grounded. Capacitor C
3 has one end connected to a connection point of the resistors R1, R2, and R3;
The other end is grounded.

One end of the impedance element Z6 is connected to the drain of the FET1. Impedance element Z
The other end of 6 is connected to the second power supply terminal Vd1.
One end of a capacitor C4 is connected to the other end of the impedance element Z6. The other end of the capacitor C4 is grounded.

A circuit composed of resistors R4 to R6 and a capacitor C7 is connected to the gate of the FET2. Resistance R
4, R5 have one ends connected to each other. The other end of the resistor R4 is connected to the first power supply terminal Vgg, and the other end of the resistor R5 is grounded. The resistor R6 includes a resistor R4 and a resistor R5.
And the gate of FET2. These resistors R4 to R6 constitute a bias circuit for FET2. One end of the capacitor C7 is connected to the resistor R4.
It is connected to the connection point of R6, and the other end is grounded.

One end of the impedance element Z7 is connected to the drain of the FET2. Impedance element Z
The other end of 7 is connected to the third power supply terminal Vd2.
One end of a capacitor C8 is connected to the other end of the impedance element Z7. The other end of the capacitor C8 is grounded.

The impedance elements Z1 to Z7 are constituted by strip lines and function as inductance components for high frequencies.

In the circuit diagram of FIG. 1, FET 1 and FE
The power amplification degree by T2 is the first power supply terminal Vgg, the second power supply terminal
Is controlled by the voltage applied to the power supply terminal Vd1 and the third power supply terminal Vd2. At this time, FET1 and FET
A current of several hundred mA to about 1.5 A is applied to 2, thereby generating heat. If the generated heat is not dissipated by any heat radiating means, the channel temperature of the semiconductor will increase, the on-resistance will increase, leading to thermal runaway, and eventually the semiconductor will be damaged. The present invention discloses a power amplification module having a structure capable of efficiently dissipating heat generated in FET1 and FET2.

FIG. 2 is a diagram showing a specific mounting example to which the present invention is applied in the power amplifier module shown in the electric circuit diagram shown in FIG. 1, and FIG. 3 is a portion taken along line 3-3 in FIG. It is sectional drawing. 2 and 3, the same reference numerals as those in FIG. 1 denote parts corresponding to the circuit components shown in FIG. The power amplification module of the illustrated embodiment includes:
It includes a substrate 1, a semiconductor chip 3, and a metal block 5.

The substrate 1 has a cutout 7 in the plane. In the illustrated embodiment, the substrate 1 is a first dielectric substrate 1
1, a second dielectric substrate 12 and a third dielectric substrate 13 are stacked. The substrate 1 may be formed by sequentially laminating and bonding the first to third dielectric substrates 11 to 13 which are independent from each other, or the first to third dielectric substrates 11 to 13 may be formed by a continuous coating method.
It may be formed by laminating dielectric layers constituting the third dielectric substrates 11 to 13 and necessary conductor patterns. The first to third dielectric substrates 11 to 13 may be made of any of an organic dielectric material and a ceramic dielectric material.

Each of the first to third dielectric substrates 11 to 13 has a cutout portion 7, and in a stacked state, the cutout portions 7 overlap at the same position and are substantially continuous. One cutout 7 is formed.

The first to third dielectric substrates 11 to 13 are provided with a passive circuit component among the circuit components included in the circuit diagram shown in FIG. 1 and a circuit configuration which requires the passive circuit component. Connect so that There is no particular limitation on the arrangement of the circuit components, but an example that can be adopted is shown below. For example,
In FIG. 1, a part of a circuit element forming a bias circuit and a circuit element forming an impedance matching circuit are mounted on the surface (upper surface) of the first dielectric substrate 11.
Specifically, resistors R1 to R6 and capacitors C1 to C1
0, impedance elements Z1 to Z7 and the like. These circuit components are composed of chip components, and the first dielectric substrate 1
1 with respect to the conductor pattern 14 formed in advance on the surface
It can be attached by means such as soldering. Alternatively, some of these circuit components may be provided on the first dielectric substrate 1
Alternatively, it may be constituted by a conductor pattern formed on the surface of one.

On the second dielectric substrate 12, a GND pattern and a conductor pattern 15 serving as a part of a bias circuit can be formed on the surface joined to the lower surface of the first dielectric substrate 11.

In the third dielectric substrate 13, the surface joined to the lower surface of the second dielectric substrate 12 has FE
A part 16 of the bias circuit of T1 and T2 is formed. Also,
On the lower surface of the third dielectric substrate 13, a GND pattern 17 is formed.

The substrate 1 is provided with an arbitrary number of through holes 21 and 22 at predetermined appropriate positions. The through hole 21 is formed, for example, by the conductor pattern 14 formed on the surface of the first dielectric substrate 11, the conductor pattern 15 formed on the second dielectric substrate 12, and the third Is used to electrically connect the conductor pattern 17 formed on the lower surface of the dielectric substrate 13. The through hole 22 is formed, for example, by a conductor filled in the through hole 22 with the conductor pattern 14 formed on the surface of the first dielectric substrate 11 and the conductor pattern 16 formed on the upper surface of the third dielectric substrate 13. Used for electrical connection.

The metal block 5 is arranged inside the cutout 7 of the substrate 1. The metal block 5 can be made of a metal material having good thermal conductivity, for example, copper or a copper alloy. The shape of the metal block 5 is arbitrary. In this embodiment, the metal block 5 is
And the cutout 7
It has an outer shape that fits into The surface of the metal block 5 substantially matches the surface of the substrate 1.

The semiconductor chip 3 is mounted on the surface of the metal block 5. The semiconductor chip 3 is shown in FIG.
It includes FET1 and FET2 used for power amplification, and is bonded to a metal block 5 provided on a part of the substrate 1 via an adhesive such as silver paste.

The electrodes of the semiconductor chip 3 are connected by wire bonding 18 onto a lead frame 19 mounted on the surface of the substrate 1, and are connected to the first and third layer matching circuits and bias circuits. You. In addition, the semiconductor chip 3
Is mounted in a sealed state with the sealing resin 20 to ensure its reliability. It is preferable that the sealing resin 20 does not flow into the component mounting area due to the step of the lead frame 19.

The substrate 1 is provided with a signal input terminal Pin, a signal output terminal Pout, a ground terminal GND, and first to third power supply terminals Vgg, Vd1, Vd2, etc. in the form of side electrodes.

As described above, in the power amplification module according to the present invention, since the semiconductor chip 3 is mounted on the surface of the metal block 5, heat generated in the semiconductor chip 3 can be radiated through the metal block 5. The metal block 5 can be made of a metal material having a significantly higher thermal conductivity than alumina or the like. For this reason, a power amplifying module with extremely excellent heat dissipation can be obtained.

Further, the substrate 1 has a cutout 7 in the plane, and the metal block 5
It is a structure to be arranged inside. For this reason, it is possible to obtain a power amplification module having a simple configuration and excellent heat dissipation.

Since the metal block 5 is arranged in the cutout 7 of the substrate 1 and the semiconductor chip 3 is mounted on the surface of the metal block 5, mounting and assembly are easy.

Further, it is easy to align the surface of the metal block 5 with the surface of the substrate 1, and the bonding operation of the semiconductor chip 3 can be performed on a surface having no step. For this reason, mounting work becomes extremely easy.

FIG. 4 is a diagram showing a state of use of the power amplification module shown in FIGS. Power amplification module 1
00 is mounted on a system board (motherboard) 200 by means such as bonding. As joining means,
For example, a silver paste or the like can be used. The bonding surface of the system board 200 can be made of a metal having good heat conductivity.

The heat generated in the semiconductor chip 3 is transmitted to the system board 200 through the metal block 5 and is radiated outside through the system board 200.

FIG. 5 shows another embodiment of the power amplification module of the present invention. In the drawings, the same components as those shown in FIGS. 1 to 4 are denoted by the same reference numerals. In the illustrated embodiment, the metal block 5 is mounted on a conductive pattern 16 provided on the upper surface of a third dielectric substrate (dielectric layer) 13 via an adhesive such as silver paste. Therefore, the metal block 5 is supported by the third dielectric substrate 13.

The conductor pattern 16 formed on the upper surface of the third dielectric substrate 13 and the conductor pattern 17 formed on the lower surface have a thickness t2 equal to the thickness t1 of the third dielectric substrate 13. The thickness is set as described above. For example, in the embodiment shown in FIG.
7, the thickness of the third dielectric substrate 1 was 70 μm.
3, the thickness t1 is set to 60 μm.

Further, the third dielectric substrate 13 has thermal vias 23 and 24 of an arbitrary number and an arbitrary size immediately below the metal block 5.

The heat transmitted from the metal block 5 to the conductor pattern 16 is transmitted to the conductor pattern 17 via thermal vias 23 and 24 provided immediately below the metal block 5 and is radiated to the outside of the module. Pattern 1
By selecting the relationship between the thickness t2 of 6, 17 and the thickness t1 of the third dielectric substrate 13 such that t1 ≦ t2, the influence of the heat dissipation by the third dielectric substrate 13 is minimized. it can. In particular, the pattern thickness t2 is increased,
By reducing the thickness t1 of the dielectric layer, the effect of heat dissipation by the dielectric can be reduced as much as possible.

As a material for the conductor patterns 16 and 17, it is possible to easily use a metal material such as copper or gold having a high thermal conductivity, and as a result, heat from the semiconductor chip 3 can be efficiently used. Heat is radiated to the outside.

The conductor pattern 17 can be a full-surface electrode. In this case, since the conductive pattern 17 can be soldered to the system board, the heat radiation to the outside can be further improved.

FIG. 6 shows a configuration diagram of another power amplification module according to the present invention. FIG. 6 shows an embodiment in which the embodiment shown in FIG. 3 is configured upside down. A metal case 9 is arranged on the uppermost surface, and the metal case 9 is connected to the metal block 5 by silver paste or solder. . The lower end of the substrate 1
Due to the formation of the side electrodes, the electrodes protrude from the component mounting surface by a certain width.

The heat generated from the semiconductor chip 3 is transmitted to the metal block 5, passes through the metal case 9, and
To the air above the This heat conduction path is a natural path in which heat goes upward from below. Therefore, the heat radiation characteristics are further improved.

The metal case 9 for heat radiation is connected to the ground terminal G.
Since it is soldered to the system board 200 by ND,
The heat received by the heat dissipating metal case 9 is
The heat is also dissipated. This also promotes heat dissipation.

[0056]

As described above, according to the present invention, the following effects can be obtained. (A) It is possible to provide a power amplifier module having a simple configuration and excellent heat dissipation. (B) It is possible to provide a power amplification module having a small shape and excellent heat dissipation. (C) It is possible to provide a power amplifying module that is easy to assemble and assemble and has excellent heat dissipation.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram of a power amplification module according to the present invention.

FIG. 2 is a diagram showing a specific implementation example to which the present invention is applied in the power amplification module shown in the electric circuit diagram shown in FIG.

FIG. 3 is a partial sectional view taken along line 3-3 in FIG. 2;

FIG. 4 is a diagram illustrating a use state of the power amplification module illustrated in FIGS. 2 and 3;

FIG. 5 is a partial sectional view showing another embodiment of the power amplification module according to the present invention.

FIG. 6 is a partial cross-sectional view showing another embodiment of the power amplification module according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 3 Semiconductor chip 5 Metal block 7 Cutout part

Claims (3)

[Claims] 1. A power amplification module including at least one substrate, a semiconductor chip, and a metal block, wherein the substrate has a cutout in a plane, and wherein the metal block includes a substrate. The power amplifier module, wherein the semiconductor chip is mounted on a surface of the metal block. 2. The power amplification module according to claim 1, wherein the substrate includes a dielectric layer provided on a surface of the metal block opposite to the surface, and the dielectric layer Has a conductor pattern on at least one surface side, wherein the conductor pattern is thicker than the dielectric layer. 3. The power amplification module according to claim 1, further comprising a metal case, wherein the metal case is provided on a surface side of the metal block facing the surface. A power amplification module that is thermally coupled to a metal block.