JPH09232433A5 - - Google Patents

Info

Publication number
JPH09232433A5
JPH09232433A5 JP1997030203A JP3020397A JPH09232433A5 JP H09232433 A5 JPH09232433 A5 JP H09232433A5 JP 1997030203 A JP1997030203 A JP 1997030203A JP 3020397 A JP3020397 A JP 3020397A JP H09232433 A5 JPH09232433 A5 JP H09232433A5
Authority
JP
Japan
Prior art keywords
memory cells
logic function
reconfigurable
function modules
programmable switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1997030203A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09232433A (ja
Filing date
Publication date
Priority claimed from US08/599,883 external-priority patent/US5737766A/en
Application filed filed Critical
Publication of JPH09232433A publication Critical patent/JPH09232433A/ja
Publication of JPH09232433A5 publication Critical patent/JPH09232433A5/ja
Pending legal-status Critical Current

Links

JP9030203A 1996-02-14 1997-02-14 プログラム可能ゲート・アレイ構成メモリ Pending JPH09232433A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US599,883 1996-02-14
US08/599,883 US5737766A (en) 1996-02-14 1996-02-14 Programmable gate array configuration memory which allows sharing with user memory

Publications (2)

Publication Number Publication Date
JPH09232433A JPH09232433A (ja) 1997-09-05
JPH09232433A5 true JPH09232433A5 (https=) 2005-01-06

Family

ID=24401488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9030203A Pending JPH09232433A (ja) 1996-02-14 1997-02-14 プログラム可能ゲート・アレイ構成メモリ

Country Status (3)

Country Link
US (1) US5737766A (https=)
EP (1) EP0790706A3 (https=)
JP (1) JPH09232433A (https=)

Families Citing this family (53)

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US6078735A (en) * 1997-09-29 2000-06-20 Xilinx, Inc. System and method for generating memory initialization logic in a target device with memory initialization bits from a programmable logic device
US7003593B2 (en) * 1997-12-17 2006-02-21 Src Computers, Inc. Computer system architecture and memory controller for close-coupling within a hybrid processing system utilizing an adaptive processor interface port
US7373440B2 (en) 1997-12-17 2008-05-13 Src Computers, Inc. Switch/network adapter port for clustered computers employing a chain of multi-adaptive processors in a dual in-line memory module format
US6076152A (en) 1997-12-17 2000-06-13 Src Computers, Inc. Multiprocessor computer architecture incorporating a plurality of memory algorithm processors in the memory subsystem
US6339819B1 (en) * 1997-12-17 2002-01-15 Src Computers, Inc. Multiprocessor with each processor element accessing operands in loaded input buffer and forwarding results to FIFO output buffer
US7565461B2 (en) 1997-12-17 2009-07-21 Src Computers, Inc. Switch/network adapter port coupling a reconfigurable processing element to one or more microprocessors for use with interleaved memory controllers
US6996656B2 (en) * 2002-10-31 2006-02-07 Src Computers, Inc. System and method for providing an arbitrated memory bus in a hybrid computing system
US7146441B1 (en) * 1998-03-16 2006-12-05 Actel Corporation SRAM bus architecture and interconnect to an FPGA
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DE19946752A1 (de) 1999-09-29 2001-04-12 Infineon Technologies Ag Rekonfigurierbares Gate-Array
US6438737B1 (en) 2000-02-15 2002-08-20 Intel Corporation Reconfigurable logic for a computer
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AU2001270874A1 (en) * 2000-07-20 2002-02-05 Celoxica Limited System, method and article of manufacture for controlling the use of resources
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KR100413762B1 (ko) * 2001-07-02 2003-12-31 삼성전자주식회사 뱅크 수를 가변할 수 있는 반도체 장치 및 그 방법
MXPA04004117A (es) * 2001-11-01 2004-09-10 Mattel Inc Juego de tablero por medio de tejos.
ATE397806T1 (de) * 2002-03-18 2008-06-15 Nxp Bv Implementierung eines konfigurationsspeichers für auf nachschlagtabellen basierte rekonfigurierbare logische architektur
US7406573B2 (en) * 2002-05-09 2008-07-29 Src Computers, Inc. Reconfigurable processor element utilizing both coarse and fine grained reconfigurable elements
US20030212853A1 (en) * 2002-05-09 2003-11-13 Huppenthal Jon M. Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core
CN100359602C (zh) * 2002-06-20 2008-01-02 中兴通讯股份有限公司 一种有效利用现场可编程门阵列中的存储器的方法
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US6964029B2 (en) * 2002-10-31 2005-11-08 Src Computers, Inc. System and method for partitioning control-dataflow graph representations
US7299458B2 (en) 2002-10-31 2007-11-20 Src Computers, Inc. System and method for converting control flow graph representations to control-dataflow graph representations
US7225324B2 (en) * 2002-10-31 2007-05-29 Src Computers, Inc. Multi-adaptive processing systems and techniques for enhancing parallelism and performance of computational functions
US7155708B2 (en) * 2002-10-31 2006-12-26 Src Computers, Inc. Debugging and performance profiling using control-dataflow graph representations with reconfigurable hardware emulation
US7185225B2 (en) * 2002-12-02 2007-02-27 Marvell World Trade Ltd. Self-reparable semiconductor and method thereof
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US20060001669A1 (en) * 2002-12-02 2006-01-05 Sehat Sutardja Self-reparable semiconductor and method thereof
US7890686B2 (en) * 2005-10-17 2011-02-15 Src Computers, Inc. Dynamic priority conflict resolution in a multi-processor computer system having shared resources
US7716100B2 (en) * 2005-12-02 2010-05-11 Kuberre Systems, Inc. Methods and systems for computing platform
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US7697329B2 (en) * 2007-01-31 2010-04-13 Sandisk 3D Llc Methods and apparatus for using a configuration array similar to an associated data array
US7843729B2 (en) * 2007-01-31 2010-11-30 Sandisk 3D Llc Methods and apparatus for using a configuration array similar to an associated data array
EP2367454B1 (en) * 2008-11-24 2016-07-06 Srl, Llc Article of footwear
US8718079B1 (en) 2010-06-07 2014-05-06 Marvell International Ltd. Physical layer devices for network switches
JP5500282B1 (ja) * 2013-02-28 2014-05-21 日本電気株式会社 障害修復装置、障害修復方法、及び、障害修復プログラム
US9536590B1 (en) * 2014-09-03 2017-01-03 Marvell International Ltd. System and method of memory electrical repair
US10037187B2 (en) * 2014-11-03 2018-07-31 Google Llc Data flow windowing and triggering
US10802735B1 (en) * 2019-04-23 2020-10-13 Arbor Company, Lllp Systems and methods for reconfiguring dual-function cell arrays
KR102440799B1 (ko) * 2019-04-23 2022-09-06 아르보 컴퍼니 엘엘엘피 이중 기능 셀 어레이를 재구성하기 위한 시스템 및 방법
US10782759B1 (en) 2019-04-23 2020-09-22 Arbor Company, Lllp Systems and methods for integrating batteries with stacked integrated circuit die elements
US11463524B2 (en) 2020-06-29 2022-10-04 Arbor Company, Lllp Mobile IoT edge device using 3D-die stacking re-configurable processor module with 5G processor-independent modem

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US5414377A (en) * 1992-12-21 1995-05-09 Xilinx, Inc. Logic block with look-up table for configuration and memory
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US5583450A (en) * 1995-08-18 1996-12-10 Xilinx, Inc. Sequencer for a time multiplexed programmable logic device

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