JPH09191060A - 集積回路のプラスチックパッケージング - Google Patents

集積回路のプラスチックパッケージング

Info

Publication number
JPH09191060A
JPH09191060A JP8339174A JP33917496A JPH09191060A JP H09191060 A JPH09191060 A JP H09191060A JP 8339174 A JP8339174 A JP 8339174A JP 33917496 A JP33917496 A JP 33917496A JP H09191060 A JPH09191060 A JP H09191060A
Authority
JP
Japan
Prior art keywords
integrated circuit
package
circuit package
pads
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8339174A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09191060A5 (enExample
Inventor
John H Abbott
エイチ アボット ジョン
Navinchandra Kalidas
カリダス ナヴィンチャンドラ
Raymond W Thompson
ダブリュー トンプソン レイモンド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPH09191060A publication Critical patent/JPH09191060A/ja
Publication of JPH09191060A5 publication Critical patent/JPH09191060A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
JP8339174A 1995-12-19 1996-12-19 集積回路のプラスチックパッケージング Pending JPH09191060A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US889995P 1995-12-19 1995-12-19
US60/008899 1995-12-19

Publications (2)

Publication Number Publication Date
JPH09191060A true JPH09191060A (ja) 1997-07-22
JPH09191060A5 JPH09191060A5 (enExample) 2004-12-02

Family

ID=21734333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8339174A Pending JPH09191060A (ja) 1995-12-19 1996-12-19 集積回路のプラスチックパッケージング

Country Status (6)

Country Link
US (2) US5777382A (enExample)
EP (1) EP0780896A3 (enExample)
JP (1) JPH09191060A (enExample)
MY (1) MY128748A (enExample)
SG (1) SG52875A1 (enExample)
TW (1) TW463276B (enExample)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5677566A (en) * 1995-05-08 1997-10-14 Micron Technology, Inc. Semiconductor chip package
JP3793628B2 (ja) * 1997-01-20 2006-07-05 沖電気工業株式会社 樹脂封止型半導体装置
JPH10294418A (ja) * 1997-04-21 1998-11-04 Oki Electric Ind Co Ltd 半導体装置
JP3210881B2 (ja) * 1997-06-05 2001-09-25 ソニーケミカル株式会社 Ｂｇａパッケージ基板
US5929522A (en) * 1998-04-17 1999-07-27 Hestia Technologies, Inc. Semiconductor non-laminate package and method
US6229200B1 (en) 1998-06-10 2001-05-08 Asat Limited Saw-singulated leadless plastic chip carrier
US7226811B1 (en) 1998-06-10 2007-06-05 Asat Ltd. Process for fabricating a leadless plastic chip carrier
US8330270B1 (en) 1998-06-10 2012-12-11 Utac Hong Kong Limited Integrated circuit package having a plurality of spaced apart pad portions
US6933594B2 (en) * 1998-06-10 2005-08-23 Asat Ltd. Leadless plastic chip carrier with etch back pad singulation
US7270867B1 (en) 1998-06-10 2007-09-18 Asat Ltd. Leadless plastic chip carrier
US6989294B1 (en) 1998-06-10 2006-01-24 Asat, Ltd. Leadless plastic chip carrier with etch back pad singulation
US7271032B1 (en) 1998-06-10 2007-09-18 Asat Ltd. Leadless plastic chip carrier with etch back pad singulation
US6872661B1 (en) 1998-06-10 2005-03-29 Asat Ltd. Leadless plastic chip carrier with etch back pad singulation and die attach pad array
US7247526B1 (en) 1998-06-10 2007-07-24 Asat Ltd. Process for fabricating an integrated circuit package
US6635957B2 (en) * 1998-06-10 2003-10-21 Asat Ltd. Leadless plastic chip carrier with etch back pad singulation and die attach pad array
KR20000028360A (ko) * 1998-10-31 2000-05-25 김규현 반도체 장치
KR100960739B1 (ko) * 1999-02-26 2010-06-01 텍사스 인스트루먼츠 인코포레이티드 열적으로 향상된 반도체 볼 그리드 어레이 디바이스 및 그제조 방법
US6052045A (en) * 1999-03-12 2000-04-18 Kearney-National, Inc. Electromechanical switching device package with controlled impedance environment
US6916683B2 (en) * 2000-05-11 2005-07-12 Micron Technology, Inc. Methods of fabricating a molded ball grid array
USRE38381E1 (en) 2000-07-21 2004-01-13 Kearney-National Inc. Inverted board mounted electromechanical device
US6391687B1 (en) * 2000-10-31 2002-05-21 Fairchild Semiconductor Corporation Column ball grid array package
AU2003230602A1 (en) * 2002-03-08 2003-09-22 Kearney-National, Inc. Surface mount molded relay package and method of manufacturing same
US7732914B1 (en) 2002-09-03 2010-06-08 Mclellan Neil Cavity-type integrated circuit package
US7009286B1 (en) 2004-01-15 2006-03-07 Asat Ltd. Thin leadless plastic chip carrier
US7411289B1 (en) 2004-06-14 2008-08-12 Asat Ltd. Integrated circuit package with partially exposed contact pads and process for fabricating the same
US7091581B1 (en) 2004-06-14 2006-08-15 Asat Limited Integrated circuit package and process for fabricating the same
US7595225B1 (en) 2004-10-05 2009-09-29 Chun Ho Fan Leadless plastic chip carrier with contact standoff
US7358119B2 (en) * 2005-01-12 2008-04-15 Asat Ltd. Thin array plastic package without die attach pad and process for fabricating the same
US7348663B1 (en) 2005-07-15 2008-03-25 Asat Ltd. Integrated circuit package and method for fabricating same
US7410830B1 (en) 2005-09-26 2008-08-12 Asat Ltd Leadless plastic chip carrier and method of fabricating same
US7256481B2 (en) * 2005-11-30 2007-08-14 Texas Instruments Incorporated Leadframes for improved moisture reliability and enhanced solderability of semiconductor devices

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61174752A (ja) * 1985-01-30 1986-08-06 Seiko Epson Corp 半導体装置
JPS6332955A (ja) * 1986-07-25 1988-02-12 Nec Corp 半導体集積回路装置
US5200362A (en) * 1989-09-06 1993-04-06 Motorola, Inc. Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film
US5293072A (en) * 1990-06-25 1994-03-08 Fujitsu Limited Semiconductor device having spherical terminals attached to the lead frame embedded within the package body
JPH0462865A (ja) * 1990-06-25 1992-02-27 Fujitsu Ltd 半導体装置及びその製造方法
KR940002444B1 (ko) * 1990-11-13 1994-03-24 금성일렉트론 주식회사 반도체 소자의 패키지 어셈블리 방법
US5157480A (en) * 1991-02-06 1992-10-20 Motorola, Inc. Semiconductor device having dual electrical contact sites
JPH0563109A (ja) * 1991-08-29 1993-03-12 New Japan Radio Co Ltd モールド型ｉｃパツケージ
JPH05144995A (ja) * 1991-11-18 1993-06-11 Matsushita Electric Works Ltd 半導体パツケージ
JPH06268101A (ja) * 1993-03-17 1994-09-22 Hitachi Ltd 半導体装置及びその製造方法、電子装置、リ−ドフレ−ム並びに実装基板
DE69527473T2 (de) * 1994-05-09 2003-03-20 Nec Corp., Tokio/Tokyo Halbleiteranordnung bestehend aus einem Halbleiterchip, der mittels Kontakthöckern auf der Leiterplatte verbunden ist und Montageverfahren
TW359880B (en) * 1995-08-30 1999-06-01 Samsung Electronics Co Ltd Method of manufacturing semiconductor chip package
US5736432A (en) * 1996-09-20 1998-04-07 National Semiconductor Corporation Lead frame with lead finger locking feature and method for making same

Also Published As

Publication number Publication date
SG52875A1 (en) 1998-09-28
MY128748A (en) 2007-02-28
EP0780896A3 (en) 1999-04-14
TW463276B (en) 2001-11-11
EP0780896A2 (en) 1997-06-25
US5976914A (en) 1999-11-02
US5777382A (en) 1998-07-07

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