JPH083078Y2 - デジタル多重化装置におけるais送出回路 - Google Patents
デジタル多重化装置におけるais送出回路Info
- Publication number
- JPH083078Y2 JPH083078Y2 JP8427889U JP8427889U JPH083078Y2 JP H083078 Y2 JPH083078 Y2 JP H083078Y2 JP 8427889 U JP8427889 U JP 8427889U JP 8427889 U JP8427889 U JP 8427889U JP H083078 Y2 JPH083078 Y2 JP H083078Y2
- Authority
- JP
- Japan
- Prior art keywords
- ais
- unit
- channel
- channel unit
- digital multiplexing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Time-Division Multiplex Systems (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8427889U JPH083078Y2 (ja) | 1989-07-17 | 1989-07-17 | デジタル多重化装置におけるais送出回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8427889U JPH083078Y2 (ja) | 1989-07-17 | 1989-07-17 | デジタル多重化装置におけるais送出回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0324736U JPH0324736U (en, 2012) | 1991-03-14 |
JPH083078Y2 true JPH083078Y2 (ja) | 1996-01-29 |
Family
ID=31632633
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8427889U Expired - Fee Related JPH083078Y2 (ja) | 1989-07-17 | 1989-07-17 | デジタル多重化装置におけるais送出回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH083078Y2 (en, 2012) |
-
1989
- 1989-07-17 JP JP8427889U patent/JPH083078Y2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH0324736U (en, 2012) | 1991-03-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH083078Y2 (ja) | デジタル多重化装置におけるais送出回路 | |
US5590279A (en) | Memory data copying apparatus | |
JP2644112B2 (ja) | Fifo試験診断回路 | |
KR100247033B1 (ko) | 동기식 전송시스템에서 데이터 통신 채널의 클럭 장애 검출 및 보상장치 | |
JP2734613B2 (ja) | 障害情報収集方式 | |
JPS6184136A (ja) | スリツプ制御回路 | |
JPH033043A (ja) | 半導体装置 | |
JPH0546729B2 (en, 2012) | ||
JPH02166846A (ja) | マルチフレーム検出回路 | |
JPS61103252A (ja) | 障害解析用メモリ装置 | |
JPH01291546A (ja) | ループ同期回路 | |
JPH01135141A (ja) | 自己障害検出回路 | |
JPH023220B2 (en, 2012) | ||
JPS606143B2 (ja) | 入力デ−タ状変検出回路 | |
JPS6352828B2 (en, 2012) | ||
JPH0411945B2 (en, 2012) | ||
JPS6359035A (ja) | デ−タ通信システム | |
JPS60128837A (ja) | 系統情報記録装置 | |
JPH0714184B2 (ja) | クロックダウン検出回路 | |
JPH0294722A (ja) | パリティ監視方式 | |
JPH07120993B2 (ja) | フレームアライナ監視回路 | |
JPS6126443A (ja) | 系統情報記録装置 | |
JPH0323018B2 (en, 2012) | ||
JPS63141138A (ja) | 切替制御回路 | |
JPS62216048A (ja) | プロセツサの暴走検出方式 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |