JPH0719148Y2 - マイクロ波回路用パッケージ - Google Patents

マイクロ波回路用パッケージ

Info

Publication number
JPH0719148Y2
JPH0719148Y2 JP1989128736U JP12873689U JPH0719148Y2 JP H0719148 Y2 JPH0719148 Y2 JP H0719148Y2 JP 1989128736 U JP1989128736 U JP 1989128736U JP 12873689 U JP12873689 U JP 12873689U JP H0719148 Y2 JPH0719148 Y2 JP H0719148Y2
Authority
JP
Japan
Prior art keywords
package
internal connection
microwave
microwave circuit
integrated substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1989128736U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0367430U (fr
Inventor
雅彦 ▲高▼橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1989128736U priority Critical patent/JPH0719148Y2/ja
Publication of JPH0367430U publication Critical patent/JPH0367430U/ja
Application granted granted Critical
Publication of JPH0719148Y2 publication Critical patent/JPH0719148Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4823—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item

Landscapes

  • Wire Bonding (AREA)
JP1989128736U 1989-11-01 1989-11-01 マイクロ波回路用パッケージ Expired - Lifetime JPH0719148Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989128736U JPH0719148Y2 (ja) 1989-11-01 1989-11-01 マイクロ波回路用パッケージ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989128736U JPH0719148Y2 (ja) 1989-11-01 1989-11-01 マイクロ波回路用パッケージ

Publications (2)

Publication Number Publication Date
JPH0367430U JPH0367430U (fr) 1991-07-01
JPH0719148Y2 true JPH0719148Y2 (ja) 1995-05-01

Family

ID=31676422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989128736U Expired - Lifetime JPH0719148Y2 (ja) 1989-11-01 1989-11-01 マイクロ波回路用パッケージ

Country Status (1)

Country Link
JP (1) JPH0719148Y2 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008026568A (ja) * 2006-07-20 2008-02-07 Olympus Corp 光学顕微鏡

Also Published As

Publication number Publication date
JPH0367430U (fr) 1991-07-01

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