JPH06333982A - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法

Info

Publication number
JPH06333982A
JPH06333982A JP5116266A JP11626693A JPH06333982A JP H06333982 A JPH06333982 A JP H06333982A JP 5116266 A JP5116266 A JP 5116266A JP 11626693 A JP11626693 A JP 11626693A JP H06333982 A JPH06333982 A JP H06333982A
Authority
JP
Japan
Prior art keywords
metal
ball
semiconductor chip
wiring board
land
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP5116266A
Other languages
English (en)
Japanese (ja)
Inventor
Motohiro Suwa
元大 諏訪
Hiroyuki Takahashi
裕之 高橋
Masahiko Nishiuma
雅彦 西馬
Chiyoshi Kamata
千代士 鎌田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Solutions Technology Ltd
Original Assignee
Hitachi ULSI Engineering Corp
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi ULSI Engineering Corp, Hitachi Ltd filed Critical Hitachi ULSI Engineering Corp
Priority to JP5116266A priority Critical patent/JPH06333982A/ja
Priority to TW083102844A priority patent/TW259894B/zh
Priority to KR1019940009859A priority patent/KR100379823B1/ko
Publication of JPH06333982A publication Critical patent/JPH06333982A/ja
Priority to US08/367,490 priority patent/US5616520A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/1308—Plural core members being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
JP5116266A 1992-03-30 1993-05-19 半導体集積回路装置の製造方法 Withdrawn JPH06333982A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP5116266A JPH06333982A (ja) 1993-05-19 1993-05-19 半導体集積回路装置の製造方法
TW083102844A TW259894B (cs) 1993-05-19 1994-03-31
KR1019940009859A KR100379823B1 (ko) 1993-05-19 1994-05-06 반도체집적회로장치의제조방법
US08/367,490 US5616520A (en) 1992-03-30 1994-12-30 Semiconductor integrated circuit device and fabrication method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5116266A JPH06333982A (ja) 1993-05-19 1993-05-19 半導体集積回路装置の製造方法

Publications (1)

Publication Number Publication Date
JPH06333982A true JPH06333982A (ja) 1994-12-02

Family

ID=14682838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5116266A Withdrawn JPH06333982A (ja) 1992-03-30 1993-05-19 半導体集積回路装置の製造方法

Country Status (3)

Country Link
JP (1) JPH06333982A (cs)
KR (1) KR100379823B1 (cs)
TW (1) TW259894B (cs)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998058409A1 (fr) * 1997-06-16 1998-12-23 Kabushiki Kaisha Tokai-Rika-Denki-Seisakusho Procede de montage de puce de semi-conducteur, procede de fabrication d'une structure de puce sur puce et procede de fabrication d'une structure de puce sur carte
WO2001026147A1 (en) * 1999-10-04 2001-04-12 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
JP2002270630A (ja) * 2001-03-13 2002-09-20 Ngk Spark Plug Co Ltd 平坦化装置及びヘッド
JP2008219052A (ja) * 2008-06-13 2008-09-18 Fujitsu Ltd 半導体装置の製造方法
JP2010517312A (ja) * 2007-01-31 2010-05-20 エセック エージー フリップチップを基質上に実装する装置
JP2013030789A (ja) * 2012-09-10 2013-02-07 Seiko Epson Corp 実装構造体及び実装構造体の製造方法
JP2013183059A (ja) * 2012-03-02 2013-09-12 New Japan Radio Co Ltd 半導体装置の製造方法
JP2016034130A (ja) * 2014-07-30 2016-03-10 太陽誘電株式会社 弾性波デバイス及びその製造方法

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998058409A1 (fr) * 1997-06-16 1998-12-23 Kabushiki Kaisha Tokai-Rika-Denki-Seisakusho Procede de montage de puce de semi-conducteur, procede de fabrication d'une structure de puce sur puce et procede de fabrication d'une structure de puce sur carte
WO2001026147A1 (en) * 1999-10-04 2001-04-12 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
US6744122B1 (en) 1999-10-04 2004-06-01 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
JP2002270630A (ja) * 2001-03-13 2002-09-20 Ngk Spark Plug Co Ltd 平坦化装置及びヘッド
JP2010517312A (ja) * 2007-01-31 2010-05-20 エセック エージー フリップチップを基質上に実装する装置
JP2008219052A (ja) * 2008-06-13 2008-09-18 Fujitsu Ltd 半導体装置の製造方法
JP2013183059A (ja) * 2012-03-02 2013-09-12 New Japan Radio Co Ltd 半導体装置の製造方法
JP2013030789A (ja) * 2012-09-10 2013-02-07 Seiko Epson Corp 実装構造体及び実装構造体の製造方法
JP2016034130A (ja) * 2014-07-30 2016-03-10 太陽誘電株式会社 弾性波デバイス及びその製造方法

Also Published As

Publication number Publication date
KR940027134A (ko) 1994-12-10
KR100379823B1 (ko) 2003-06-02
TW259894B (cs) 1995-10-11

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Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20000801