JPH06275739A - セラミック製アダプター及びセラミックパッケージ - Google Patents

セラミック製アダプター及びセラミックパッケージ

Info

Publication number
JPH06275739A
JPH06275739A JP5086837A JP8683793A JPH06275739A JP H06275739 A JPH06275739 A JP H06275739A JP 5086837 A JP5086837 A JP 5086837A JP 8683793 A JP8683793 A JP 8683793A JP H06275739 A JPH06275739 A JP H06275739A
Authority
JP
Japan
Prior art keywords
ceramic
package
ceramic package
printed wiring
adapter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5086837A
Other languages
English (en)
Japanese (ja)
Inventor
Hiroyuki Fujita
浩幸 藤多
Thomas Goodman
トーマス・グッドマン
Yoshikazu Murakami
義和 村上
Hidetoshi Kawasaki
英俊 川▲崎▼
T Murphy Arthur
アーサー・ティー・マーフィー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
EIDP Inc
Original Assignee
Sony Corp
EI Du Pont de Nemours and Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp, EI Du Pont de Nemours and Co filed Critical Sony Corp
Priority to JP5086837A priority Critical patent/JPH06275739A/ja
Priority to KR1019940005715A priority patent/KR940022811A/ko
Publication of JPH06275739A publication Critical patent/JPH06275739A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01K—ANIMAL HUSBANDRY; AVICULTURE; APICULTURE; PISCICULTURE; FISHING; REARING OR BREEDING ANIMALS, NOT OTHERWISE PROVIDED FOR; NEW BREEDS OF ANIMALS
    • A01K97/00—Accessories for angling
    • A01K97/12—Signalling devices, e.g. tip-up devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Environmental Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Biodiversity & Conservation Biology (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Animal Husbandry (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Connecting Device With Holders (AREA)
JP5086837A 1993-03-23 1993-03-23 セラミック製アダプター及びセラミックパッケージ Pending JPH06275739A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP5086837A JPH06275739A (ja) 1993-03-23 1993-03-23 セラミック製アダプター及びセラミックパッケージ
KR1019940005715A KR940022811A (ko) 1993-03-23 1994-03-22 세라믹제 어댑터 세라믹 패키지

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5086837A JPH06275739A (ja) 1993-03-23 1993-03-23 セラミック製アダプター及びセラミックパッケージ

Publications (1)

Publication Number Publication Date
JPH06275739A true JPH06275739A (ja) 1994-09-30

Family

ID=13897930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5086837A Pending JPH06275739A (ja) 1993-03-23 1993-03-23 セラミック製アダプター及びセラミックパッケージ

Country Status (2)

Country Link
JP (1) JPH06275739A (ko)
KR (1) KR940022811A (ko)

Cited By (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09199824A (ja) * 1995-11-16 1997-07-31 Matsushita Electric Ind Co Ltd プリント配線板とその実装体
JPH1012762A (ja) * 1996-06-24 1998-01-16 Kyocera Corp 配線基板
JPH10107188A (ja) * 1996-09-27 1998-04-24 Kyocera Corp 半導体装置
US5744862A (en) * 1996-03-29 1998-04-28 Mitsubishi Denki Kabushiki Kaisha Reduced thickness semiconductor device with IC packages mounted in openings on substrate
JPH10335823A (ja) * 1997-05-28 1998-12-18 Kyocera Corp 積層セラミック回路基板及びその製造方法
JPH11262537A (ja) * 1997-12-12 1999-09-28 Ela Medical Sa 能動植え込み型医療装置の電子回路ならびにその製造方法
JPH11274344A (ja) * 1998-03-20 1999-10-08 Nec Kansai Ltd 電子素子封止用パッケージ及び電子素子封止構体
JP2000349177A (ja) * 1999-06-08 2000-12-15 Mitsubishi Electric Corp 半導体装置とその製造方法
JP2002100704A (ja) * 1995-02-09 2002-04-05 Kyocera Corp パッケージおよびその実装構造
JP2002164740A (ja) * 1995-01-24 2002-06-07 Cts Corp 両面実装可能な発振器パッケージに部品を結合する方法
JP2002329803A (ja) * 2001-04-27 2002-11-15 Mitsubishi Electric Corp 電子回路モジュールおよびその製造方法
JP2003188314A (ja) * 2001-12-20 2003-07-04 Sony Corp 素子内蔵基板の製造方法および素子内蔵基板
JP2004523128A (ja) * 2001-06-11 2004-07-29 ザイリンクス　インコーポレイテッド 最小限の熱の不整合で熱除去を実現する高性能フリップチップパッケージ
JP2005167072A (ja) * 2003-12-04 2005-06-23 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP2005354093A (ja) * 2005-07-15 2005-12-22 Kyocera Corp 電子部品実装基板およびその製造方法
JP2006128363A (ja) * 2004-10-28 2006-05-18 Kyocera Corp 多数個取り配線基板および電子装置
JP2006148177A (ja) * 2006-03-06 2006-06-08 Kyocera Corp 積層セラミック回路基板
JP2006190808A (ja) * 2005-01-06 2006-07-20 Matsushita Electric Ind Co Ltd 半導体装置、半導体装置の製造方法およびカード型記録媒体
JP2006319136A (ja) * 2005-05-12 2006-11-24 Mitsubishi Electric Corp 高周波モジュール
JP2007251192A (ja) * 2007-05-07 2007-09-27 Kyocera Corp 電子部品実装基板
JP2008072151A (ja) * 2007-12-03 2008-03-27 Kyocera Corp 回路基板
JP2008263150A (ja) * 2007-04-16 2008-10-30 Matsushita Electric Ind Co Ltd 半導体装置および検査方法
JP2012009865A (ja) * 2010-06-23 2012-01-12 Lg Innotek Co Ltd セラミック基板及びその製造方法並びにイメージセンサーパッケージ及びその製造方法
JP2017204610A (ja) * 2016-05-13 2017-11-16 大日本印刷株式会社 実装基板及びそれを備える電子機器
JP2019129189A (ja) * 2018-01-22 2019-08-01 京セラ株式会社 配線基板、パッケージおよび電子装置
JP2019133987A (ja) * 2018-01-29 2019-08-08 京セラ株式会社 電子部品収納用基板およびこれを用いたパッケージ

Cited By (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002164740A (ja) * 1995-01-24 2002-06-07 Cts Corp 両面実装可能な発振器パッケージに部品を結合する方法
JP2002100704A (ja) * 1995-02-09 2002-04-05 Kyocera Corp パッケージおよびその実装構造
JPH09199824A (ja) * 1995-11-16 1997-07-31 Matsushita Electric Ind Co Ltd プリント配線板とその実装体
US5744862A (en) * 1996-03-29 1998-04-28 Mitsubishi Denki Kabushiki Kaisha Reduced thickness semiconductor device with IC packages mounted in openings on substrate
JPH1012762A (ja) * 1996-06-24 1998-01-16 Kyocera Corp 配線基板
JPH10107188A (ja) * 1996-09-27 1998-04-24 Kyocera Corp 半導体装置
JPH10335823A (ja) * 1997-05-28 1998-12-18 Kyocera Corp 積層セラミック回路基板及びその製造方法
JPH11262537A (ja) * 1997-12-12 1999-09-28 Ela Medical Sa 能動植え込み型医療装置の電子回路ならびにその製造方法
JPH11274344A (ja) * 1998-03-20 1999-10-08 Nec Kansai Ltd 電子素子封止用パッケージ及び電子素子封止構体
JP2000349177A (ja) * 1999-06-08 2000-12-15 Mitsubishi Electric Corp 半導体装置とその製造方法
JP2002329803A (ja) * 2001-04-27 2002-11-15 Mitsubishi Electric Corp 電子回路モジュールおよびその製造方法
JP2004523128A (ja) * 2001-06-11 2004-07-29 ザイリンクス　インコーポレイテッド 最小限の熱の不整合で熱除去を実現する高性能フリップチップパッケージ
JP2003188314A (ja) * 2001-12-20 2003-07-04 Sony Corp 素子内蔵基板の製造方法および素子内蔵基板
JP2005167072A (ja) * 2003-12-04 2005-06-23 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP4511311B2 (ja) * 2004-10-28 2010-07-28 京セラ株式会社 多数個取り配線基板および電子装置
JP2006128363A (ja) * 2004-10-28 2006-05-18 Kyocera Corp 多数個取り配線基板および電子装置
JP2006190808A (ja) * 2005-01-06 2006-07-20 Matsushita Electric Ind Co Ltd 半導体装置、半導体装置の製造方法およびカード型記録媒体
JP2006319136A (ja) * 2005-05-12 2006-11-24 Mitsubishi Electric Corp 高周波モジュール
JP2005354093A (ja) * 2005-07-15 2005-12-22 Kyocera Corp 電子部品実装基板およびその製造方法
JP2006148177A (ja) * 2006-03-06 2006-06-08 Kyocera Corp 積層セラミック回路基板
JP2008263150A (ja) * 2007-04-16 2008-10-30 Matsushita Electric Ind Co Ltd 半導体装置および検査方法
JP2007251192A (ja) * 2007-05-07 2007-09-27 Kyocera Corp 電子部品実装基板
JP2008072151A (ja) * 2007-12-03 2008-03-27 Kyocera Corp 回路基板
JP2012009865A (ja) * 2010-06-23 2012-01-12 Lg Innotek Co Ltd セラミック基板及びその製造方法並びにイメージセンサーパッケージ及びその製造方法
JP2017204610A (ja) * 2016-05-13 2017-11-16 大日本印刷株式会社 実装基板及びそれを備える電子機器
JP2019129189A (ja) * 2018-01-22 2019-08-01 京セラ株式会社 配線基板、パッケージおよび電子装置
JP2019133987A (ja) * 2018-01-29 2019-08-08 京セラ株式会社 電子部品収納用基板およびこれを用いたパッケージ

Also Published As

Publication number Publication date
KR940022811A (ko) 1994-10-21

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