JPH0582969B2 - - Google Patents

Info

Publication number
JPH0582969B2
JPH0582969B2 JP61152388A JP15238886A JPH0582969B2 JP H0582969 B2 JPH0582969 B2 JP H0582969B2 JP 61152388 A JP61152388 A JP 61152388A JP 15238886 A JP15238886 A JP 15238886A JP H0582969 B2 JPH0582969 B2 JP H0582969B2
Authority
JP
Japan
Prior art keywords
semiconductor
film
insulating film
semiconductor device
electrode structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61152388A
Other languages
English (en)
Japanese (ja)
Other versions
JPS637649A (ja
Inventor
Hiroyuki Fujisada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP61152388A priority Critical patent/JPS637649A/ja
Publication of JPS637649A publication Critical patent/JPS637649A/ja
Publication of JPH0582969B2 publication Critical patent/JPH0582969B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP61152388A 1986-06-28 1986-06-28 半導体素子の電極構造 Granted JPS637649A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61152388A JPS637649A (ja) 1986-06-28 1986-06-28 半導体素子の電極構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61152388A JPS637649A (ja) 1986-06-28 1986-06-28 半導体素子の電極構造

Publications (2)

Publication Number Publication Date
JPS637649A JPS637649A (ja) 1988-01-13
JPH0582969B2 true JPH0582969B2 (enrdf_load_stackoverflow) 1993-11-24

Family

ID=15539424

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61152388A Granted JPS637649A (ja) 1986-06-28 1986-06-28 半導体素子の電極構造

Country Status (1)

Country Link
JP (1) JPS637649A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010177248A (ja) * 2009-01-27 2010-08-12 Anritsu Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JPS637649A (ja) 1988-01-13

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term