JPH0571116B2 - - Google Patents

Info

Publication number
JPH0571116B2
JPH0571116B2 JP60228772A JP22877285A JPH0571116B2 JP H0571116 B2 JPH0571116 B2 JP H0571116B2 JP 60228772 A JP60228772 A JP 60228772A JP 22877285 A JP22877285 A JP 22877285A JP H0571116 B2 JPH0571116 B2 JP H0571116B2
Authority
JP
Japan
Prior art keywords
memory
data
address
bits
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60228772A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6289085A (ja
Inventor
Yasushi Fukunaga
Makoto Fujita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60228772A priority Critical patent/JPS6289085A/ja
Publication of JPS6289085A publication Critical patent/JPS6289085A/ja
Publication of JPH0571116B2 publication Critical patent/JPH0571116B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Controls And Circuits For Display Device (AREA)
JP60228772A 1985-10-16 1985-10-16 デ−タ転送方法 Granted JPS6289085A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60228772A JPS6289085A (ja) 1985-10-16 1985-10-16 デ−タ転送方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60228772A JPS6289085A (ja) 1985-10-16 1985-10-16 デ−タ転送方法

Publications (2)

Publication Number Publication Date
JPS6289085A JPS6289085A (ja) 1987-04-23
JPH0571116B2 true JPH0571116B2 (enrdf_load_stackoverflow) 1993-10-06

Family

ID=16881597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60228772A Granted JPS6289085A (ja) 1985-10-16 1985-10-16 デ−タ転送方法

Country Status (1)

Country Link
JP (1) JPS6289085A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2507422B2 (ja) * 1987-04-30 1996-06-12 株式会社東芝 ビツトマツプイメ−ジ処理装置

Also Published As

Publication number Publication date
JPS6289085A (ja) 1987-04-23

Similar Documents

Publication Publication Date Title
US5226147A (en) Semiconductor memory device for simple cache system
US5509132A (en) Semiconductor memory device having an SRAM as a cache memory integrated on the same chip and operating method thereof
KR920010950B1 (ko) 컴퓨터 시스템과 정보 판독 및 데이타 전송방법
JP2523586B2 (ja) 半導体記憶装置
JPS62152050A (ja) 半導体メモリ
JPH032943A (ja) 記憶システム
KR100595871B1 (ko) 읽기 및 쓰기 동작에 여러 다른 버스트 순서 어드레싱을가진 메모리 소자
JP2895488B2 (ja) 半導体記憶装置及び半導体記憶システム
EP0646925B1 (en) Fully scalable memory apparatus
JPH0390942A (ja) 主記憶装置の制御方式
JPH0721114A (ja) マルチプロセッサシステムの共有メモリ制御装置
JPH10134576A (ja) 半導体メモリ装置
JPH0571116B2 (enrdf_load_stackoverflow)
US6854041B2 (en) DRAM-based separate I/O memory solution for communication applications
JPH0546527A (ja) デユアルポートメモリ回路
JPS6326753A (ja) メモリ−バス制御方法
JPH0427583B2 (enrdf_load_stackoverflow)
JPH024020B2 (enrdf_load_stackoverflow)
JPH04278651A (ja) 主記憶装置
JP2625145B2 (ja) メモリアクセス制御装置
JPS63217460A (ja) バツフア制御回路
JPS59114660A (ja) フイ−ルド選択読取り方式
JPH0756753B2 (ja) メモリ装置
JPH0642266B2 (ja) メモリアクセス回路
JPH04247391A (ja) 時分割方式２ポートメモリ