JPH0563817B2 - - Google Patents

Info

Publication number
JPH0563817B2
JPH0563817B2 JP56187352A JP18735281A JPH0563817B2 JP H0563817 B2 JPH0563817 B2 JP H0563817B2 JP 56187352 A JP56187352 A JP 56187352A JP 18735281 A JP18735281 A JP 18735281A JP H0563817 B2 JPH0563817 B2 JP H0563817B2
Authority
JP
Japan
Prior art keywords
external storage
control
dkc
channel
dku
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56187352A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5890256A (ja
Inventor
Michio Myazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP18735281A priority Critical patent/JPS5890256A/ja
Publication of JPS5890256A publication Critical patent/JPS5890256A/ja
Publication of JPH0563817B2 publication Critical patent/JPH0563817B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
JP18735281A 1981-11-21 1981-11-21 外部記憶制御方式 Granted JPS5890256A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18735281A JPS5890256A (ja) 1981-11-21 1981-11-21 外部記憶制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18735281A JPS5890256A (ja) 1981-11-21 1981-11-21 外部記憶制御方式

Publications (2)

Publication Number Publication Date
JPS5890256A JPS5890256A (ja) 1983-05-28
JPH0563817B2 true JPH0563817B2 (enrdf_load_stackoverflow) 1993-09-13

Family

ID=16204484

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18735281A Granted JPS5890256A (ja) 1981-11-21 1981-11-21 外部記憶制御方式

Country Status (1)

Country Link
JP (1) JPS5890256A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59194511U (ja) * 1983-06-13 1984-12-24 本田技研工業株式会社 内燃機関用休止機能付動弁装置
JPS6037030A (ja) * 1983-08-09 1985-02-26 Fujitsu Ltd フアイル接続方式

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS585825A (ja) * 1981-07-03 1983-01-13 Fujitsu Ltd デバイスクロスコ−ルにおけるリザ−ブ／レリ−ズ方式

Also Published As

Publication number Publication date
JPS5890256A (ja) 1983-05-28

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