JPH0562311B2 - - Google Patents

Info

Publication number
JPH0562311B2
JPH0562311B2 JP58100589A JP10058983A JPH0562311B2 JP H0562311 B2 JPH0562311 B2 JP H0562311B2 JP 58100589 A JP58100589 A JP 58100589A JP 10058983 A JP10058983 A JP 10058983A JP H0562311 B2 JPH0562311 B2 JP H0562311B2
Authority
JP
Japan
Prior art keywords
test
pattern
pattern data
data
generators
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58100589A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59225368A (ja
Inventor
Shizuo Kamikura
Kazunori Asada
Shuichi Kameyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58100589A priority Critical patent/JPS59225368A/ja
Publication of JPS59225368A publication Critical patent/JPS59225368A/ja
Publication of JPH0562311B2 publication Critical patent/JPH0562311B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
JP58100589A 1983-06-06 1983-06-06 論理回路試験装置 Granted JPS59225368A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58100589A JPS59225368A (ja) 1983-06-06 1983-06-06 論理回路試験装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58100589A JPS59225368A (ja) 1983-06-06 1983-06-06 論理回路試験装置

Publications (2)

Publication Number Publication Date
JPS59225368A JPS59225368A (ja) 1984-12-18
JPH0562311B2 true JPH0562311B2 (enrdf_load_html_response) 1993-09-08

Family

ID=14278060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58100589A Granted JPS59225368A (ja) 1983-06-06 1983-06-06 論理回路試験装置

Country Status (1)

Country Link
JP (1) JPS59225368A (enrdf_load_html_response)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63177772U (enrdf_load_html_response) * 1987-05-08 1988-11-17
WO1998023968A1 (fr) * 1996-11-29 1998-06-04 Advantest Corporation Generateur de configuration

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5720674A (en) * 1980-07-11 1982-02-03 Toshiba Corp Lsi tester

Also Published As

Publication number Publication date
JPS59225368A (ja) 1984-12-18

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