JPH0553324B2 - - Google Patents

Info

Publication number
JPH0553324B2
JPH0553324B2 JP59503463A JP50346384A JPH0553324B2 JP H0553324 B2 JPH0553324 B2 JP H0553324B2 JP 59503463 A JP59503463 A JP 59503463A JP 50346384 A JP50346384 A JP 50346384A JP H0553324 B2 JPH0553324 B2 JP H0553324B2
Authority
JP
Japan
Prior art keywords
transistor
emitter
node
collector
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59503463A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60502182A (ja
Inventor
Hemitsuji Dei Baradarayan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JPS60502182A publication Critical patent/JPS60502182A/ja
Publication of JPH0553324B2 publication Critical patent/JPH0553324B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
JP59503463A 1983-09-07 1984-09-06 電流切換装置 Granted JPS60502182A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US530176 1983-09-07
US06/530,176 US4617478A (en) 1983-09-07 1983-09-07 Emitter coupled logic having enhanced speed characteristic for turn-on and turn-off

Publications (2)

Publication Number Publication Date
JPS60502182A JPS60502182A (ja) 1985-12-12
JPH0553324B2 true JPH0553324B2 (cg-RX-API-DMAC7.html) 1993-08-09

Family

ID=24112723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59503463A Granted JPS60502182A (ja) 1983-09-07 1984-09-06 電流切換装置

Country Status (5)

Country Link
US (1) US4617478A (cg-RX-API-DMAC7.html)
EP (1) EP0155305B1 (cg-RX-API-DMAC7.html)
JP (1) JPS60502182A (cg-RX-API-DMAC7.html)
DE (1) DE3479467D1 (cg-RX-API-DMAC7.html)
WO (1) WO1985001166A1 (cg-RX-API-DMAC7.html)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223792A (en) * 1986-09-19 1993-06-29 Actel Corporation Testability architecture and techniques for programmable interconnect architecture
US5013938A (en) * 1989-11-01 1991-05-07 National Semiconductor Corporation ECL cutoff driver circuit with reduced stanby power dissipation
TW200612884A (en) * 2004-07-02 2006-05-01 Discus Dental Impressions Inc Support system for dentistry

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3114844A (en) * 1958-10-14 1963-12-17 Gen Electric Two transistor gate circuit
NL248800A (cg-RX-API-DMAC7.html) * 1959-03-03
FR1398092A (fr) * 1964-03-26 1965-05-07 Saint Gobain Nouveau circuit électronique de commutation
US3582795A (en) * 1969-08-14 1971-06-01 Bell Telephone Labor Inc Delayed clock pulse synchronizing of random input pulses
US3955099A (en) * 1974-03-11 1976-05-04 Hughes Aircraft Company Diode controlled idle current injection
US4140926A (en) * 1977-08-22 1979-02-20 Motorola, Inc. Inverted transistor circuits for monolithic integrated circuit application
JPS5494269A (en) * 1978-01-09 1979-07-25 Hitachi Ltd Logic circuit
US4357547A (en) * 1981-02-23 1982-11-02 Motorola, Inc. EFL Toggle flip-flop
US4401901A (en) * 1981-06-01 1983-08-30 Advanced Micro Devices, Inc. Comparator
US4538075A (en) * 1983-09-07 1985-08-27 Advanced Micro Devices, Inc. High speed referenceless bipolar logic gate with minimum input current

Also Published As

Publication number Publication date
DE3479467D1 (en) 1989-09-21
JPS60502182A (ja) 1985-12-12
WO1985001166A1 (en) 1985-03-14
EP0155305A4 (en) 1986-12-08
EP0155305A1 (en) 1985-09-25
US4617478A (en) 1986-10-14
EP0155305B1 (en) 1989-08-16

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Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term