JPH055182B2 - - Google Patents

Info

Publication number
JPH055182B2
JPH055182B2 JP58177482A JP17748283A JPH055182B2 JP H055182 B2 JPH055182 B2 JP H055182B2 JP 58177482 A JP58177482 A JP 58177482A JP 17748283 A JP17748283 A JP 17748283A JP H055182 B2 JPH055182 B2 JP H055182B2
Authority
JP
Japan
Prior art keywords
silicon
silicon carbide
oxide film
oxidation
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58177482A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6066866A (ja
Inventor
Akira Suzuki
Masaki Furukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP58177482A priority Critical patent/JPS6066866A/ja
Priority to DE19843434727 priority patent/DE3434727A1/de
Publication of JPS6066866A publication Critical patent/JPS6066866A/ja
Priority to US07/759,120 priority patent/US5272107A/en
Publication of JPH055182B2 publication Critical patent/JPH055182B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
JP58177482A 1983-09-24 1983-09-24 炭化珪素ｍｏｓ構造の製造方法 Granted JPS6066866A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP58177482A JPS6066866A (ja) 1983-09-24 1983-09-24 炭化珪素ｍｏｓ構造の製造方法
DE19843434727 DE3434727A1 (de) 1983-09-24 1984-09-21 Verfahren zur herstellung von siliciumcarbid(sic)-metalloxidhalbleiter-(mos)-bauteilen
US07/759,120 US5272107A (en) 1983-09-24 1991-09-09 Manufacture of silicon carbide (SiC) metal oxide semiconductor (MOS) device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58177482A JPS6066866A (ja) 1983-09-24 1983-09-24 炭化珪素ｍｏｓ構造の製造方法

Publications (2)

Publication Number Publication Date
JPS6066866A JPS6066866A (ja) 1985-04-17
JPH055182B2 true JPH055182B2 (enrdf_load_stackoverflow) 1993-01-21

Family

ID=16031676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58177482A Granted JPS6066866A (ja) 1983-09-24 1983-09-24 炭化珪素ｍｏｓ構造の製造方法

Country Status (2)

Country Link
JP (1) JPS6066866A (enrdf_load_stackoverflow)
DE (1) DE3434727A1 (enrdf_load_stackoverflow)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2615390B2 (ja) * 1985-10-07 1997-05-28 工業技術院長 炭化シリコン電界効果トランジスタの製造方法
JPH0728024B2 (ja) * 1986-03-10 1995-03-29 工業技術院長 炭化けい素を用いた半導体素子
US5459107A (en) * 1992-06-05 1995-10-17 Cree Research, Inc. Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures
US5612260A (en) * 1992-06-05 1997-03-18 Cree Research, Inc. Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures
WO1999009585A1 (en) * 1997-08-13 1999-02-25 Matsushita Electric Industrial Co., Ltd. Semiconductor substrate and semiconductor device
FR2801723B1 (fr) * 1999-11-25 2003-09-05 Commissariat Energie Atomique Couche de silicium tres sensible a l'oxygene et procede d'obtention de cette couche
JP2006216918A (ja) * 2005-02-07 2006-08-17 Kyoto Univ 半導体素子の製造方法
US8841682B2 (en) * 2009-08-27 2014-09-23 Cree, Inc. Transistors with a gate insulation layer having a channel depleting interfacial charge and related fabrication methods
JP5605005B2 (ja) 2010-06-16 2014-10-15 住友電気工業株式会社 炭化珪素半導体装置の製造方法および炭化珪素半導体装置の製造装置
JP2012004275A (ja) 2010-06-16 2012-01-05 Sumitomo Electric Ind Ltd 炭化珪素半導体装置の製造方法
JP2012004269A (ja) * 2010-06-16 2012-01-05 Sumitomo Electric Ind Ltd 炭化珪素半導体装置の製造方法および炭化珪素半導体装置の製造装置
GB2483702A (en) * 2010-09-17 2012-03-21 Ge Aviat Systems Ltd Method for the manufacture of a Silicon Carbide, Silicon Oxide interface having reduced interfacial carbon gettering
JP2025017198A (ja) * 2023-07-24 2025-02-05 株式会社東芝 半導体装置の製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1089298B (it) * 1977-01-17 1985-06-18 Mostek Corp Procedimento per fabbricare un dispositivo semiconduttore

Also Published As

Publication number Publication date
DE3434727A1 (de) 1985-04-11
DE3434727C2 (enrdf_load_stackoverflow) 1987-12-17
JPS6066866A (ja) 1985-04-17

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