JPH055182B2 - - Google Patents

Info

Publication number
JPH055182B2
JPH055182B2 JP58177482A JP17748283A JPH055182B2 JP H055182 B2 JPH055182 B2 JP H055182B2 JP 58177482 A JP58177482 A JP 58177482A JP 17748283 A JP17748283 A JP 17748283A JP H055182 B2 JPH055182 B2 JP H055182B2
Authority
JP
Japan
Prior art keywords
silicon
silicon carbide
oxide film
oxidation
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58177482A
Other languages
Japanese (ja)
Other versions
JPS6066866A (en
Inventor
Akira Suzuki
Masaki Furukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP17748283A priority Critical patent/JPS6066866A/en
Priority to DE19843434727 priority patent/DE3434727A1/en
Publication of JPS6066866A publication Critical patent/JPS6066866A/en
Priority to US07/759,120 priority patent/US5272107A/en
Publication of JPH055182B2 publication Critical patent/JPH055182B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048Making electrodes
    • H01L21/049Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)

Description

【発明の詳細な説明】 〈技術分野〉 本発明は、炭化珪素を半導体材料として、炭化
珪素半導体上に酸化膜を堆積したMOS(Metal−
Oxide−Semiconductor)構造の製造方法に関す
るものである。
[Detailed Description of the Invention] <Technical Field> The present invention relates to a MOS (Metal-MOS) in which silicon carbide is used as a semiconductor material and an oxide film is deposited on the silicon carbide semiconductor.
The present invention relates to a method for manufacturing an Oxide-Semiconductor (Oxide-Semiconductor) structure.

〈従来技術〉 炭化珪素は、広い禁制帯幅をもち(2.2〜
3.3eV)、また熱的、化学的及び機械的に極めて
安定で、放射線損傷にも強いという特長をもつて
いる。このため炭化珪素を半導体材料としたトラ
ンジスタ、ダイオードをはじめとする電子素子
は、珪素などの他の半導体材料を用いた素子では
使用が困難な高温、大電力、放射線照射等の苛酷
な条件においても使用することができ、高い信頼
性と安定性を示す素子として広範な分野での応用
が期待されている。
<Prior art> Silicon carbide has a wide forbidden band width (2.2~
3.3 eV), it is extremely stable thermally, chemically and mechanically, and is resistant to radiation damage. For this reason, electronic devices such as transistors and diodes that use silicon carbide as a semiconductor material can withstand harsh conditions such as high temperatures, high power, and radiation exposure that make it difficult to use devices using other semiconductor materials such as silicon. As a device that can be used and exhibits high reliability and stability, it is expected to be applied in a wide range of fields.

また半導体(Semiconductor)表面に酸化膜
(Oxide)を形成し、その上に金属(Metal)電
極を設置するMOS構造は、MOSダイオード、
MOS電界効果トランジスタ、MOS集積回路など
の電子素子の基本構造として、珪素半導体素子な
どに広く応用されている。
In addition, the MOS structure, in which an oxide film is formed on the surface of a semiconductor and a metal electrode is placed on top of it, is a MOS diode,
It is widely applied to silicon semiconductor devices as the basic structure of electronic devices such as MOS field effect transistors and MOS integrated circuits.

上記炭化珪素半導体のMOS構造を用いたダイ
オード、トランジスタ、集積回路などの素子も、
上述の炭化珪素の特長を生かして広範な分野での
用途が期待される。しかしながら、炭化珪素半導
体を用いてMOS構造を作成しようとした場合、
珪素半導体で通常用いられている熱酸化法等を適
用して炭化珪素を酸化しても、酸化速度は遅く、
また炭化珪素と酸化膜の境界領域が広がり、急峻
な界面を示さないことが多い。このためMOS構
造をとる素子に必要とされる500〜2000Å程度の
膜厚をもち、炭化珪素半導体表面と急峻な界面を
もち、しかも高い電気絶縁性を示す酸化膜を形成
することが困難であつた。
Elements such as diodes, transistors, and integrated circuits that use the MOS structure of the silicon carbide semiconductor mentioned above are also available.
Silicon carbide is expected to be used in a wide range of fields by taking advantage of its features described above. However, when trying to create a MOS structure using silicon carbide semiconductor,
Even if silicon carbide is oxidized using thermal oxidation methods commonly used for silicon semiconductors, the oxidation rate is slow;
Furthermore, the boundary region between silicon carbide and the oxide film is wide and often does not show a steep interface. For this reason, it is difficult to form an oxide film that has a thickness of about 500 to 2000 Å, has a steep interface with the silicon carbide semiconductor surface, and exhibits high electrical insulation properties, which is required for elements with a MOS structure. Ta.

〈発明の目的〉 本発明は上述の問題点に鑑みてなされたもの
で、炭化珪素を半導体材料として、該炭化珪素上
に、MOS構造をもつ電子素子を作成するに適し
た酸化膜を短時間で安定して確実に作成すること
ができる炭化珪素MOS構造の構造方法を提供す
る。
<Object of the Invention> The present invention has been made in view of the above-mentioned problems, and uses silicon carbide as a semiconductor material and forms an oxide film suitable for creating an electronic device with a MOS structure on the silicon carbide in a short period of time. Provided is a method for constructing a silicon carbide MOS structure that can be stably and reliably created.

〈実施例〉 本発明は、炭化珪素の表面に珪素の薄膜を堆積
させ、該珪素薄膜を酸化して酸化膜を形成し、該
酸化珪素膜上に金属電極を被着してMOS構造を
作成するもので、次に実施例を挙げて詳細に説明
する。
<Example> The present invention creates a MOS structure by depositing a silicon thin film on the surface of silicon carbide, oxidizing the silicon thin film to form an oxide film, and depositing a metal electrode on the silicon oxide film. The present invention will now be described in detail by way of examples.

第1図において、炭化珪素1の表面上に、モノ
シラン(SiH4)ガスの熱分野により珪素の薄膜
2を堆積させる。該珪素薄膜2の形成は2〜5分
の熱分解により300〜600Åの膜厚が得られた。珪
素薄膜2が形成された炭化珪素1を毎分数百cm3
流されている酸素ガス雰囲気中で1000〜1100℃の
温度に晒し、珪素薄膜2を熱酸化する。該熱酸化
により炭化珪素1上の珪素薄膜2は酸化されて第
2図に示す如く厚さ600〜1200Åの酸化膜3が形
成される。該酸化膜3上にアルミニウム(Al)
を蒸着することにより第3図に示すMOS構造が
作成される。上記珪素酸化膜3は高い電気絶縁性
を示し、また炭化珪素半導体1表面との境界も急
峻な界面をもつ良好なMOS構造であつた。
In FIG. 1, a thin film 2 of silicon is deposited on the surface of silicon carbide 1 by a thermal field of monosilane (SiH 4 ) gas. The silicon thin film 2 was formed by thermal decomposition for 2 to 5 minutes to obtain a film thickness of 300 to 600 Å. Silicon carbide 1 on which silicon thin film 2 has been formed is exposed to a temperature of 1000 to 1100° C. in an oxygen gas atmosphere flowing at several hundred cm 3 per minute to thermally oxidize silicon thin film 2 . By this thermal oxidation, the silicon thin film 2 on the silicon carbide 1 is oxidized to form an oxide film 3 having a thickness of 600 to 1200 Å as shown in FIG. Aluminum (Al) on the oxide film 3
The MOS structure shown in FIG. 3 is created by vapor-depositing. The silicon oxide film 3 exhibited high electrical insulation and had a good MOS structure with a steep interface with the surface of the silicon carbide semiconductor 1.

上記実施例において炭化珪素1は、電子素子を
構成するに必要な不純物拡散等の処理が適宜施こ
されて、集積回路等の電子素子が形成される。
In the embodiments described above, silicon carbide 1 is appropriately subjected to treatments such as impurity diffusion necessary for forming an electronic device, thereby forming an electronic device such as an integrated circuit.

以上の実施例においては、珪素の堆積法とし
て、モノシランガスの熱分解を用いたが、他のガ
ス、例えば四塩化珪素(SiCl4)の熱分解によつ
てもよく、また、スパツタ法、蒸着法、グロー放
電法等の方法によつて珪素を堆積してもよい。ま
た珪素の酸化法として酸素を用いて熱酸化を行な
つたが、水蒸気を用いた熱酸化でもよく、また電
解陽極酸化、プラズマ陽極酸化等の他の方法によ
つてもよい。金属電極としてアルミニウムを用い
たが他の金属でもよい。
In the above embodiments, thermal decomposition of monosilane gas was used as the silicon deposition method, but other gases, such as thermal decomposition of silicon tetrachloride (SiCl 4 ), may also be used. Silicon may be deposited by a method such as a glow discharge method or the like. Further, although thermal oxidation using oxygen was performed as a method for oxidizing silicon, thermal oxidation using water vapor may be used, or other methods such as electrolytic anodic oxidation, plasma anodic oxidation, etc. may be used. Although aluminum was used as the metal electrode, other metals may be used.

〈効果〉 本発明による方法は、炭化珪素上に堆積した酸
化速度の速い珪素を酸化して酸化膜を形成するた
め、短時間で所望の酸化膜を得ることができる。
また酸化膜厚は堆積した珪素の膜厚によつて決定
されるため、酸化温度、酸化時間等の酸化条件の
影響をうけることなく膜厚を制御することがで
き、工程管理が非常に容易な製造方法を得ること
ができる。
<Effects> The method according to the present invention forms an oxide film by oxidizing silicon, which has a high oxidation rate, deposited on silicon carbide, so that a desired oxide film can be obtained in a short time.
In addition, since the oxide film thickness is determined by the thickness of the deposited silicon, the film thickness can be controlled without being affected by oxidation conditions such as oxidation temperature and oxidation time, making process control very easy. A manufacturing method can be obtained.

一方、炭化珪素上に堆積した珪素は、炭化珪素
の構成元素の一部と一致し、又、炭化珪素も珪素
と同様、酸化により二酸化珪素となるため、酸化
工程の終点を厳密に管理する必要がなく、例え、
酸化工程で炭化珪素の一部が酸化されたとして
も、ごく短時間であるから、この酸化が炭化珪素
と二酸化珪素膜との界面急峻性を低下させる恐れ
もない。
On the other hand, silicon deposited on silicon carbide matches some of the constituent elements of silicon carbide, and like silicon, silicon carbide becomes silicon dioxide through oxidation, so the end point of the oxidation process must be strictly controlled. There is no example,
Even if a part of the silicon carbide is oxidized in the oxidation step, it is only for a very short time, so there is no fear that this oxidation will reduce the steepness of the interface between the silicon carbide and the silicon dioxide film.

本方法により、MOS構造素子作成に必要な膜
厚をもち、かつ炭化珪素との境界も急峻な界面を
もつ良好な特性を示すMOS構造を製作すること
が可能となる。
By this method, it is possible to fabricate a MOS structure that has a film thickness necessary for fabricating a MOS structure element, has a steep interface with silicon carbide, and exhibits good characteristics.

本発明は単にMOS構造の製造のみならず、
MOS構造を構成要素とするダイオード、トラン
ジスタ、集積回路等の各素子中のMOS構造の製
造にも適用することができる。
The present invention is not limited to simply manufacturing MOS structures;
It can also be applied to the manufacture of MOS structures in elements such as diodes, transistors, and integrated circuits that have MOS structures as constituent elements.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第3図は本発明の実施例の説明に供
する断面図である。 1……炭化珪素、2……珪素、3……酸化膜、
4……アルミニウム電極。
1 to 3 are cross-sectional views for explaining embodiments of the present invention. 1...Silicon carbide, 2...Silicon, 3...Oxide film,
4...Aluminum electrode.

Claims (1)

【特許請求の範囲】 1 炭化珪素(SiC)の表面に珪素(Si)の薄膜
を堆積し、 少なくとも前記珪素薄膜を酸化して二酸化珪素
膜(SiO2)を形成し、 該二酸化珪素膜上に金属薄膜を被着することを
特徴とする炭化珪素MOS構造の製造方法。
[Claims] 1. Depositing a silicon (Si) thin film on the surface of silicon carbide (SiC), oxidizing at least the silicon thin film to form a silicon dioxide film (SiO 2 ), and depositing a silicon dioxide film (SiO 2 ) on the silicon dioxide film. A method for manufacturing a silicon carbide MOS structure characterized by depositing a metal thin film.
JP17748283A 1983-09-24 1983-09-24 Manufacture of silicon carbide mos structure Granted JPS6066866A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP17748283A JPS6066866A (en) 1983-09-24 1983-09-24 Manufacture of silicon carbide mos structure
DE19843434727 DE3434727A1 (en) 1983-09-24 1984-09-21 Process for fabricating silicon carbide (SiC)/metal oxide semiconductor (MOS) components
US07/759,120 US5272107A (en) 1983-09-24 1991-09-09 Manufacture of silicon carbide (SiC) metal oxide semiconductor (MOS) device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17748283A JPS6066866A (en) 1983-09-24 1983-09-24 Manufacture of silicon carbide mos structure

Publications (2)

Publication Number Publication Date
JPS6066866A JPS6066866A (en) 1985-04-17
JPH055182B2 true JPH055182B2 (en) 1993-01-21

Family

ID=16031676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17748283A Granted JPS6066866A (en) 1983-09-24 1983-09-24 Manufacture of silicon carbide mos structure

Country Status (2)

Country Link
JP (1) JPS6066866A (en)
DE (1) DE3434727A1 (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2615390B2 (en) * 1985-10-07 1997-05-28 工業技術院長 Method of manufacturing silicon carbide field effect transistor
JPH0728024B2 (en) * 1986-03-10 1995-03-29 工業技術院長 Semiconductor device using silicon carbide
US5629531A (en) * 1992-06-05 1997-05-13 Cree Research, Inc. Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures
US5459107A (en) * 1992-06-05 1995-10-17 Cree Research, Inc. Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures
EP0971394A4 (en) * 1997-08-13 2000-01-12 Matsushita Electric Ind Co Ltd Semiconductor substrate and semiconductor device
FR2801723B1 (en) * 1999-11-25 2003-09-05 Commissariat Energie Atomique HIGHLY OXYGEN-SENSITIVE SILICON LAYER AND METHOD FOR OBTAINING THE LAYER
JP2006216918A (en) * 2005-02-07 2006-08-17 Kyoto Univ Manufacturing method of semiconductor device
US8841682B2 (en) * 2009-08-27 2014-09-23 Cree, Inc. Transistors with a gate insulation layer having a channel depleting interfacial charge and related fabrication methods
JP5605005B2 (en) * 2010-06-16 2014-10-15 住友電気工業株式会社 Silicon carbide semiconductor device manufacturing method and silicon carbide semiconductor device manufacturing apparatus
JP2012004275A (en) * 2010-06-16 2012-01-05 Sumitomo Electric Ind Ltd Method of manufacturing silicon carbide semiconductor device
JP2012004269A (en) * 2010-06-16 2012-01-05 Sumitomo Electric Ind Ltd Method of manufacturing silicon carbide semiconductor device and apparatus of manufacturing silicon carbide semiconductor device
GB2483702A (en) * 2010-09-17 2012-03-21 Ge Aviat Systems Ltd Method for the manufacture of a Silicon Carbide, Silicon Oxide interface having reduced interfacial carbon gettering

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1089298B (en) * 1977-01-17 1985-06-18 Mostek Corp PROCEDURE FOR MANUFACTURING A SEMICONDUCTIVE DEVICE

Also Published As

Publication number Publication date
DE3434727C2 (en) 1987-12-17
DE3434727A1 (en) 1985-04-11
JPS6066866A (en) 1985-04-17

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