JPH0546579B2 - - Google Patents
Info
- Publication number
- JPH0546579B2 JPH0546579B2 JP60013151A JP1315185A JPH0546579B2 JP H0546579 B2 JPH0546579 B2 JP H0546579B2 JP 60013151 A JP60013151 A JP 60013151A JP 1315185 A JP1315185 A JP 1315185A JP H0546579 B2 JPH0546579 B2 JP H0546579B2
- Authority
- JP
- Japan
- Prior art keywords
- bits
- data
- clock
- supplied
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000005540 biological transmission Effects 0.000 description 20
- 101000614627 Homo sapiens Keratin, type I cytoskeletal 13 Proteins 0.000 description 9
- 102100040487 Keratin, type I cytoskeletal 13 Human genes 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- 101000975474 Homo sapiens Keratin, type I cytoskeletal 10 Proteins 0.000 description 4
- 102100023970 Keratin, type I cytoskeletal 10 Human genes 0.000 description 4
- 238000012856 packing Methods 0.000 description 4
- 230000000873 masking effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000007781 pre-processing Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 108010076504 Protein Sorting Signals Proteins 0.000 description 1
- RRLHMJHRFMHVNM-BQVXCWBNSA-N [(2s,3r,6r)-6-[5-[5-hydroxy-3-(4-hydroxyphenyl)-4-oxochromen-7-yl]oxypentoxy]-2-methyl-3,6-dihydro-2h-pyran-3-yl] acetate Chemical compound C1=C[C@@H](OC(C)=O)[C@H](C)O[C@H]1OCCCCCOC1=CC(O)=C2C(=O)C(C=3C=CC(O)=CC=3)=COC2=C1 RRLHMJHRFMHVNM-BQVXCWBNSA-N 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60013151A JPS61251930A (ja) | 1985-01-26 | 1985-01-26 | デイジタルデ−タの処理回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60013151A JPS61251930A (ja) | 1985-01-26 | 1985-01-26 | デイジタルデ−タの処理回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61251930A JPS61251930A (ja) | 1986-11-08 |
| JPH0546579B2 true JPH0546579B2 (enrdf_load_stackoverflow) | 1993-07-14 |
Family
ID=11825163
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60013151A Granted JPS61251930A (ja) | 1985-01-26 | 1985-01-26 | デイジタルデ−タの処理回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61251930A (enrdf_load_stackoverflow) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63163527A (ja) * | 1986-12-25 | 1988-07-07 | Nec Corp | デ−タ詰め込み回路 |
-
1985
- 1985-01-26 JP JP60013151A patent/JPS61251930A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61251930A (ja) | 1986-11-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS648374B2 (enrdf_load_stackoverflow) | ||
| JPH0546579B2 (enrdf_load_stackoverflow) | ||
| US4125897A (en) | High speed pulse interpolator | |
| JPS603715B2 (ja) | 可変長シフトレジスタ | |
| JP2783495B2 (ja) | クロック乗せ換え回路 | |
| JPS5947394B2 (ja) | 可変長二次元シストレジスタ | |
| JPH0311565B2 (enrdf_load_stackoverflow) | ||
| JP2850671B2 (ja) | 可変遅延回路 | |
| JPH079280Y2 (ja) | スタック回路 | |
| JPS6017131B2 (ja) | メモリ制御回路 | |
| KR0124771Y1 (ko) | 병렬 데이타 선입 선출 장치 | |
| JPS5970332A (ja) | ジツタ付加回路 | |
| JP2518387B2 (ja) | シリアルデ―タ伝送回路 | |
| KR910006684Y1 (ko) | 중앙처리장치 신호 제어회로 | |
| JP2000011637A (ja) | Fifo型記憶装置 | |
| JPS5932819B2 (ja) | アドレス制御装置 | |
| JPS6226743B2 (enrdf_load_stackoverflow) | ||
| JPH02244329A (ja) | ディジタル信号処理装置 | |
| KR910009100B1 (ko) | 그래픽 처리장치의 이미지 변환장치 | |
| JPH03248242A (ja) | メモリ制御回路 | |
| JPH0637627A (ja) | カウンタ読込み方式 | |
| JP2000078030A (ja) | インターリーブアドレス発生器及びインターリーブアドレス発生方法 | |
| JPH04145747A (ja) | 並列信号処理回路 | |
| JPH0520864A (ja) | Fifoメモリ容量拡張回路 | |
| JPS60243696A (ja) | 拡大デ−タ発生装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |