JPH0544175B2 - - Google Patents
Info
- Publication number
- JPH0544175B2 JPH0544175B2 JP58181157A JP18115783A JPH0544175B2 JP H0544175 B2 JPH0544175 B2 JP H0544175B2 JP 58181157 A JP58181157 A JP 58181157A JP 18115783 A JP18115783 A JP 18115783A JP H0544175 B2 JPH0544175 B2 JP H0544175B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor device
- manufacturing
- film
- alignment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Electron Beam Exposure (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58181157A JPS6074434A (ja) | 1983-09-29 | 1983-09-29 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58181157A JPS6074434A (ja) | 1983-09-29 | 1983-09-29 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6074434A JPS6074434A (ja) | 1985-04-26 |
| JPH0544175B2 true JPH0544175B2 (enrdf_load_stackoverflow) | 1993-07-05 |
Family
ID=16095881
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58181157A Granted JPS6074434A (ja) | 1983-09-29 | 1983-09-29 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6074434A (enrdf_load_stackoverflow) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5856334A (ja) * | 1981-09-29 | 1983-04-04 | Fujitsu Ltd | 位置合わせマ−ク |
| JPS58102523A (ja) * | 1981-12-15 | 1983-06-18 | Toshiba Corp | 位置合わは用マ−カ |
-
1983
- 1983-09-29 JP JP58181157A patent/JPS6074434A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6074434A (ja) | 1985-04-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0817930A (ja) | エッチング・ストップ層を利用する半導体装置構造とその方法 | |
| JPS5851412B2 (ja) | 半導体装置の微細加工方法 | |
| JPH0466345B2 (enrdf_load_stackoverflow) | ||
| JPH0544175B2 (enrdf_load_stackoverflow) | ||
| US20020028394A1 (en) | Method for manufacturing a membrane mask | |
| JPH07226396A (ja) | パターン形成方法 | |
| JPS59132132A (ja) | 微細パタ−ンの形成方法 | |
| JPS6211491B2 (enrdf_load_stackoverflow) | ||
| JPS6154247B2 (enrdf_load_stackoverflow) | ||
| JP2798944B2 (ja) | 薄膜形成方法 | |
| JP2973439B2 (ja) | 基体のエッチング方法 | |
| JPH11305023A (ja) | シリコン回折格子の製造方法 | |
| KR100468824B1 (ko) | 단일전자소자제작을위한감광막제거방법 | |
| JPH0497523A (ja) | 半導体装置の製造方法 | |
| JPH09127678A (ja) | 半導体集積回路デバイスにおける金属マスクの製造方法 | |
| KR960013140B1 (ko) | 반도체 소자의 제조 방법 | |
| JPH08107112A (ja) | 半導体装置の配線形成方法 | |
| JPH0327521A (ja) | Mos型トランジスタの製造方法 | |
| JPH04364726A (ja) | パターン形成方法 | |
| JPH03259528A (ja) | 半導体装置の製造方法 | |
| JPS61279689A (ja) | 側壁保護膜を有したエツチングマスク構造とその製造方法 | |
| JPS6193629A (ja) | 半導体装置の製造方法 | |
| JPS6020517A (ja) | 半導体装置の製造法 | |
| JPH0282526A (ja) | 微細パターン形成方法 | |
| JPS62131515A (ja) | 粒子ビ−ム露光用位置合せマ−ク |