JPH0533532B2 - - Google Patents

Info

Publication number
JPH0533532B2
JPH0533532B2 JP61185531A JP18553186A JPH0533532B2 JP H0533532 B2 JPH0533532 B2 JP H0533532B2 JP 61185531 A JP61185531 A JP 61185531A JP 18553186 A JP18553186 A JP 18553186A JP H0533532 B2 JPH0533532 B2 JP H0533532B2
Authority
JP
Japan
Prior art keywords
connection bumps
connection
bumps
lsi chip
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61185531A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6341036A (ja
Inventor
Mutsuo Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP61185531A priority Critical patent/JPS6341036A/ja
Publication of JPS6341036A publication Critical patent/JPS6341036A/ja
Publication of JPH0533532B2 publication Critical patent/JPH0533532B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)
JP61185531A 1986-08-06 1986-08-06 半導体装置 Granted JPS6341036A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61185531A JPS6341036A (ja) 1986-08-06 1986-08-06 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61185531A JPS6341036A (ja) 1986-08-06 1986-08-06 半導体装置

Publications (2)

Publication Number Publication Date
JPS6341036A JPS6341036A (ja) 1988-02-22
JPH0533532B2 true JPH0533532B2 (enrdf_load_html_response) 1993-05-19

Family

ID=16172430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61185531A Granted JPS6341036A (ja) 1986-08-06 1986-08-06 半導体装置

Country Status (1)

Country Link
JP (1) JPS6341036A (enrdf_load_html_response)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0943304A (ja) * 1995-07-26 1997-02-14 Nec Corp 半導体試験装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2768336B2 (ja) * 1995-12-18 1998-06-25 日本電気株式会社 半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53123074A (en) * 1977-04-01 1978-10-27 Nec Corp Semiconductor device
JPS5512791A (en) * 1978-07-14 1980-01-29 Nec Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0943304A (ja) * 1995-07-26 1997-02-14 Nec Corp 半導体試験装置

Also Published As

Publication number Publication date
JPS6341036A (ja) 1988-02-22

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