JPS5512791A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5512791A
JPS5512791A JP8625178A JP8625178A JPS5512791A JP S5512791 A JPS5512791 A JP S5512791A JP 8625178 A JP8625178 A JP 8625178A JP 8625178 A JP8625178 A JP 8625178A JP S5512791 A JPS5512791 A JP S5512791A
Authority
JP
Japan
Prior art keywords
electrodes
group
axes
arranging
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8625178A
Other languages
Japanese (ja)
Inventor
Toshio Kasuga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8625178A priority Critical patent/JPS5512791A/en
Publication of JPS5512791A publication Critical patent/JPS5512791A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Abstract

PURPOSE: To provide a stable lead-connecting work by arranging lead electrodes in a plurality of rows along one side of a semiconductor element and arranging such that the axes of the electrodes perpendicular to this side of the element do not overlap one another.
CONSTITUTION: A plurality of ordinary lead electrodes 21 of a first group are disposed in a row along one side of the semiconductor element 1, whereas the lead electrodes 22 of the second group are arranged such that the axes of these elements, perpendicular to the side of the element, do not overlap the axes of the electrodes 21 of the first group perpendicular to the side of the element. By arranging the electrodes 22 of the second group in this manner, the area of the element is reduced to a half of that of the case where equal numbers of electrodes are arranged in one row on the side of the element. As a result, the yield of the element is improved. Also, in a simultaneous connection of a plurality of leads, areas for pressing and heating jigs are reduced to prevent the undesirable uneven pressing and heating.
COPYRIGHT: (C)1980,JPO&Japio
JP8625178A 1978-07-14 1978-07-14 Semiconductor device Pending JPS5512791A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8625178A JPS5512791A (en) 1978-07-14 1978-07-14 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8625178A JPS5512791A (en) 1978-07-14 1978-07-14 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5512791A true JPS5512791A (en) 1980-01-29

Family

ID=13881591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8625178A Pending JPS5512791A (en) 1978-07-14 1978-07-14 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5512791A (en)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5778173A (en) * 1980-11-04 1982-05-15 Hitachi Ltd Semiconductor device and manufacture thereof
JPS5868959A (en) * 1981-10-19 1983-04-25 Ricoh Co Ltd Film carrier
JPS601838A (en) * 1983-06-17 1985-01-08 Matsushita Electric Ind Co Ltd Semiconductor device
JPS601990A (en) * 1983-05-23 1985-01-08 アールシーエー　ライセンシング　コーポレーシヨン Video signal processor
JPS605693A (en) * 1983-05-31 1985-01-12 バール　テクノロジース　インコーポレイテツド Intensity controller of video
US4496965A (en) * 1981-05-18 1985-01-29 Texas Instruments Incorporated Stacked interdigitated lead frame assembly
JPS6230342A (en) * 1985-07-31 1987-02-09 Nec Corp Semiconductor device
JPS62152154A (en) * 1985-12-26 1987-07-07 Toshiba Corp Bonding method on tape carrier system
JPS62188333A (en) * 1986-02-14 1987-08-17 Nec Corp Integrated circuit device
JPS6341036A (en) * 1986-08-06 1988-02-22 Nec Corp Semiconductor device
JPS6377127A (en) * 1986-09-19 1988-04-07 Mitsubishi Electric Corp Semiconductor device
JPH01145138U (en) * 1988-03-29 1989-10-05
JPH03119740A (en) * 1989-10-02 1991-05-22 Hitachi Ltd Structure of semiconductor device and its manufacturing apparatus
JPH03159144A (en) * 1989-11-16 1991-07-09 Hitachi Ltd Semiconductor device
US5117275A (en) * 1990-10-24 1992-05-26 International Business Machines Corporation Electronic substrate multiple location conductor attachment technology
DE4215467A1 (en) * 1991-05-11 1992-11-12 Gold Star Electronics Integration of two semiconductor chips inside standard outline package - uses solder bumps on both dice which are bonded face-to-face in lead-on-chip configuration to lead frame
US5229328A (en) * 1990-10-24 1993-07-20 International Business Machines Corporation Method for bonding dielectric mounted conductors to semiconductor chip contact pads
US5233221A (en) * 1990-10-24 1993-08-03 International Business Machines Corporation Electronic substrate multiple location conductor attachment technology
US5317189A (en) * 1992-06-29 1994-05-31 Rohm Co., Ltd. Axial lead frame
US5327009A (en) * 1992-05-22 1994-07-05 Nec Corporation Miniaturized integrated circuit package

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5778173A (en) * 1980-11-04 1982-05-15 Hitachi Ltd Semiconductor device and manufacture thereof
JPH0132670B2 (en) * 1980-11-04 1989-07-10 Hitachi Ltd
US4496965A (en) * 1981-05-18 1985-01-29 Texas Instruments Incorporated Stacked interdigitated lead frame assembly
JPS5868959A (en) * 1981-10-19 1983-04-25 Ricoh Co Ltd Film carrier
JPS601990A (en) * 1983-05-23 1985-01-08 アールシーエー　ライセンシング　コーポレーシヨン Video signal processor
JPH0356513B2 (en) * 1983-05-23 1991-08-28
JPS605693A (en) * 1983-05-31 1985-01-12 バール　テクノロジース　インコーポレイテツド Intensity controller of video
JPH0356514B2 (en) * 1983-05-31 1991-08-28
JPS601838A (en) * 1983-06-17 1985-01-08 Matsushita Electric Ind Co Ltd Semiconductor device
JPH0469425B2 (en) * 1983-06-17 1992-11-06 Matsushita Electric Ind Co Ltd
JPS6230342A (en) * 1985-07-31 1987-02-09 Nec Corp Semiconductor device
JPS62152154A (en) * 1985-12-26 1987-07-07 Toshiba Corp Bonding method on tape carrier system
JPS62188333A (en) * 1986-02-14 1987-08-17 Nec Corp Integrated circuit device
JPS6341036A (en) * 1986-08-06 1988-02-22 Nec Corp Semiconductor device
JPH0533532B2 (en) * 1986-08-06 1993-05-19 Nippon Electric Co
JPH0533824B2 (en) * 1986-09-19 1993-05-20 Mitsubishi Electric Corp
JPS6377127A (en) * 1986-09-19 1988-04-07 Mitsubishi Electric Corp Semiconductor device
JPH0719162Y2 (en) * 1988-03-29 1995-05-01 日本特殊陶業株式会社 Integrated circuit package
JPH01145138U (en) * 1988-03-29 1989-10-05
JPH03119740A (en) * 1989-10-02 1991-05-22 Hitachi Ltd Structure of semiconductor device and its manufacturing apparatus
JPH03159144A (en) * 1989-11-16 1991-07-09 Hitachi Ltd Semiconductor device
US5117275A (en) * 1990-10-24 1992-05-26 International Business Machines Corporation Electronic substrate multiple location conductor attachment technology
US5229328A (en) * 1990-10-24 1993-07-20 International Business Machines Corporation Method for bonding dielectric mounted conductors to semiconductor chip contact pads
US5233221A (en) * 1990-10-24 1993-08-03 International Business Machines Corporation Electronic substrate multiple location conductor attachment technology
DE4215467A1 (en) * 1991-05-11 1992-11-12 Gold Star Electronics Integration of two semiconductor chips inside standard outline package - uses solder bumps on both dice which are bonded face-to-face in lead-on-chip configuration to lead frame
US5572068A (en) * 1991-05-11 1996-11-05 Goldstar Electron Co., Inc. Integrated double-chip semiconductor package and method for fabricating same
DE4215467C2 (en) * 1991-05-11 2001-04-26 Gold Star Electronics Semiconductor package and method for producing such a package
US5327009A (en) * 1992-05-22 1994-07-05 Nec Corporation Miniaturized integrated circuit package
US5317189A (en) * 1992-06-29 1994-05-31 Rohm Co., Ltd. Axial lead frame

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