JPH0469927U - - Google Patents

Info

Publication number
JPH0469927U
JPH0469927U JP11387490U JP11387490U JPH0469927U JP H0469927 U JPH0469927 U JP H0469927U JP 11387490 U JP11387490 U JP 11387490U JP 11387490 U JP11387490 U JP 11387490U JP H0469927 U JPH0469927 U JP H0469927U
Authority
JP
Japan
Prior art keywords
mos transistor
channel mos
reset signal
signal input
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11387490U
Other languages
English (en)
Japanese (ja)
Other versions
JP2577127Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990113874U priority Critical patent/JP2577127Y2/ja
Publication of JPH0469927U publication Critical patent/JPH0469927U/ja
Application granted granted Critical
Publication of JP2577127Y2 publication Critical patent/JP2577127Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Logic Circuits (AREA)
JP1990113874U 1990-10-29 1990-10-29 リセット信号入力回路 Expired - Fee Related JP2577127Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990113874U JP2577127Y2 (ja) 1990-10-29 1990-10-29 リセット信号入力回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990113874U JP2577127Y2 (ja) 1990-10-29 1990-10-29 リセット信号入力回路

Publications (2)

Publication Number Publication Date
JPH0469927U true JPH0469927U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-06-22
JP2577127Y2 JP2577127Y2 (ja) 1998-07-23

Family

ID=31861498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990113874U Expired - Fee Related JP2577127Y2 (ja) 1990-10-29 1990-10-29 リセット信号入力回路

Country Status (1)

Country Link
JP (1) JP2577127Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Also Published As

Publication number Publication date
JP2577127Y2 (ja) 1998-07-23

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees