JPH0458168B2 - - Google Patents
Info
- Publication number
- JPH0458168B2 JPH0458168B2 JP58214499A JP21449983A JPH0458168B2 JP H0458168 B2 JPH0458168 B2 JP H0458168B2 JP 58214499 A JP58214499 A JP 58214499A JP 21449983 A JP21449983 A JP 21449983A JP H0458168 B2 JPH0458168 B2 JP H0458168B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- pattern
- resist film
- resist
- pattern forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 claims description 21
- 239000000758 substrate Substances 0.000 claims description 11
- 238000001035 drying Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 16
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 8
- 229910004298 SiO 2 Inorganic materials 0.000 description 6
- 239000011521 glass Substances 0.000 description 5
- 235000012431 wafers Nutrition 0.000 description 5
- 239000011651 chromium Substances 0.000 description 4
- 235000019441 ethanol Nutrition 0.000 description 4
- 230000018109 developmental process Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 230000007261 regionalization Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- WGLPBDUCMAPZCE-UHFFFAOYSA-N Trioxochromium Chemical compound O=[Cr](=O)=O WGLPBDUCMAPZCE-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 229910000423 chromium oxide Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000006552 photochemical reaction Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000012487 rinsing solution Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/095—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
Landscapes
- Engineering & Computer Science (AREA)
- Architecture (AREA)
- Structural Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Description
【発明の詳細な説明】
(1) 発明の技術分野
本発明はパターン形成方法、詳しくは多層レジ
ストプロセスにおけるパターン形成方法に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a pattern forming method, and more particularly to a pattern forming method in a multilayer resist process.
(2) 技術の背景
半導体装置の製造工程において、ウエハ上に酸
化膜（SiO2膜）を形成しそれをエツチングして
パターンを形成し、またはガラスマスク基板にク
ロム（Cr）、酸化クロム（CrO）の膜を塗布し、
その膜をエツチングしてパターンを形成すること
が頻繁に行われる。SiO2膜のパターン形成を例
にとると、SiO2膜上に感光性レジスト（ホトレ
ジスト）を塗布し、ステツパーを用いるステツ
プ・アンド・リピート方式でこのレジストを露光
し、現像して１つのパターンを作り、このパター
ンをマスクにしてSiO2をエツチングする。(2) Background of technology In the manufacturing process of semiconductor devices, an oxide film (SiO 2 film) is formed on a wafer and etched to form a pattern, or chromium (Cr), chromium oxide (CrO 2 film) is formed on a glass mask substrate. ) coated with a film of
The film is often etched to form a pattern. Taking pattern formation on a SiO 2 film as an example, a photoresist (photoresist) is applied onto the SiO 2 film, exposed to light using a step-and-repeat method using a stepper, and developed to form a single pattern. Then, etching SiO 2 using this pattern as a mask.
(3) 従来技術と問題点
従来前記したレジストは１層の膜に形成され、
それの露光、現像をなした後にエツチングを行
い、その作業はなんらの支障なく実施されてい
た。(3) Prior art and problems Conventionally, the above-mentioned resist is formed into a single layer film,
After exposure and development, etching was carried out without any problems.
前記した露光は光（紫外線）を用いてなすが、
最近はパターンが微細化される傾向にあり、光以
外の電子線、Ｘ線等のビームを用いるプロセスが
検討されている。しかしごく一部のものを除いて
光以外のプロセスは未だ実用化されない状況にあ
る。その点、光はプロセスとの関係で安定してい
るので、光を用いるサブミクロン・オーダーの微
細パターンの形成が検討されている。 The above-mentioned exposure is done using light (ultraviolet light),
Recently, there is a trend toward finer patterns, and processes using beams other than light, such as electron beams and X-rays, are being considered. However, with the exception of a few processes, processes other than light have not yet been put into practical use. In this regard, since light is stable in relation to the process, the formation of fine patterns on the submicron order using light is being considered.
この点をやや詳細に説明すると、製造される半
導体デバイスの高集積化が進むと、ウエハ上に酸
化膜、窒化膜、多結晶シリコン（ポリシリコン）
等が順次堆積され、それらがエツチングされると
ウエハ表面に多くの凹凸が作られ、段差の深いと
ころではレジストが厚く、また段差の高いところ
ではレジストが薄くなり、レジストが均一の膜厚
で塗布されないことになる。 To explain this point in more detail, as the degree of integration of manufactured semiconductor devices progresses, oxide films, nitride films, and polycrystalline silicon (polysilicon) are deposited on wafers.
etc. are deposited one after another, and when they are etched, many irregularities are created on the wafer surface, and the resist is thicker where the steps are deep and thinner where the steps are higher, making it difficult for the resist to be coated with a uniform film thickness. It will not be done.
従来はパターン幅が3μm〜5μm程度であつたも
のが、デバイスの高集積化を実現するために
1.5μm〜2μm程度と微細になつてきているので、
前記したレジスト膜の膜厚の不均一は微細パター
ン形成の障害となる。かくして、１層のレジスト
では微細パターン形成に無理があることが判明
し、レジスト膜を多層に設ける多層レジストプロ
セスが開発された。 Traditionally, the pattern width was around 3μm to 5μm, but in order to achieve high integration of devices,
As they are becoming finer, around 1.5μm to 2μm,
The above-mentioned non-uniformity in the thickness of the resist film becomes an obstacle to the formation of fine patterns. It was thus discovered that it was difficult to form fine patterns with a single layer of resist, and a multilayer resist process was developed in which multiple layers of resist were formed.
多層レジストプロセスを第１図の断面図を参照
して説明すると、基板（例えばシリコンウエハま
たはガラスマスク基板）１上にはパターン形成膜
２（例えばSiO2膜、窒化膜、Cr膜、CrO膜）が
形成されており、このパターン形成膜２をエツチ
ングしたい。そのとき、第１層レジスト膜３（例
えば遠紫外線感光性の東京応化(株)社製の
ODUR1013なる商品名のレジスト膜）を塗布し、
ベークし、その上に第２層レジスト膜４（紫外線
感光性のAZ−1370またはOFPR−800なる商品名
のレジスト膜）を塗布する。パターン形成膜２に
前記した凹凸があつても、それは第１層レジスト
膜３によつて平坦化され、第２層レジスト膜４の
表面は平坦になり、パターン形成膜２の凹凸の悪
影響はなくなる。ステツプ・アンド・リピート方
式で第２層レジスト膜４を露光し、現像して図示
の如き第２層レジスト膜４のパターンを得る。 To explain the multilayer resist process with reference to the cross-sectional view of FIG. 1, a pattern forming film 2 (e.g. SiO 2 film, nitride film, Cr film, CrO film) is formed on a substrate (e.g. silicon wafer or glass mask substrate) 1. has been formed, and it is desired to etch this pattern forming film 2. At that time, the first resist film 3 (for example, a deep ultraviolet-sensitive film manufactured by Tokyo Ohka Co., Ltd.) is used.
Apply a resist film (trade name: ODUR1013),
After baking, a second resist film 4 (an ultraviolet-sensitive resist film with a trade name of AZ-1370 or OFPR-800) is applied thereon. Even if the pattern forming film 2 has the above-described unevenness, it is flattened by the first layer resist film 3, and the surface of the second layer resist film 4 becomes flat, and the adverse effects of the unevenness of the pattern forming film 2 disappear. . The second layer resist film 4 is exposed to light using a step-and-repeat method and developed to obtain a pattern of the second layer resist film 4 as shown in the figure.
次いで遠紫外線のフラツド露光を行うと、第２
層レジスト膜４がマスクとなつて図に砂地を付し
た部分が光化学反応によつて変質する。次いで現
像によつてこの部分を第２図に示す如く除去する
のであるが、マスクにした第２層レジスト膜４を
そのまま残して現像するので、レジストのスカム
（滓）４ａが第１層レジストの谷間にたまつて第
１層レジスト膜３のパターンを乱したり、または
図に４ｂで示す如く垂れ下がり、パターン形成膜
２のエツチングにおいてパターンが正確に形成さ
れない問題がある。 Next, when flat exposure to deep ultraviolet light is performed, the second
The layered resist film 4 serves as a mask, and the sandy areas in the figure are altered by a photochemical reaction. Next, this portion is removed by development as shown in FIG. 2, but since the second layer resist film 4 used as a mask is left as it is during development, the resist scum 4a is removed from the first layer resist. There is a problem in that the pattern forming film 2 is not accurately formed when it is etched because it accumulates in the valleys and disturbs the pattern of the first resist film 3, or it hangs down as shown at 4b in the figure.
(4) 発明の目的
本発明は上記従来の欠点に鑑み、多層レジスト
フロセスを用いるパターンの形成において、光を
用いサブミクロンの幅の微細パターンがなんらの
欠点なしに形成されうるパターン形成方法を提供
することを目的とするものである。(4) Purpose of the Invention In view of the above-mentioned conventional drawbacks, the present invention provides a pattern forming method in which a fine pattern with a submicron width can be formed using light without any drawbacks in pattern formation using a multilayer resist process. The purpose is to provide
(5) 発明の構成
そしてこの目的は本発明によれば、基板上に設
けられたパターン形成膜にパターンを形成する方
法において、前記パターン形成膜上に遠紫外線感
光性の第１層レジスト膜を形成する工程、該第１
層レジスト膜上に紫外線感光性の第２層レジスト
膜を形成する工程、該第２レジスト膜を露光、現
像してマスクパターンを形成する工程、該マスク
パターンにより第１層レジスト膜を露光する工
程、該マスクパターンを除去する工程、第１層レ
ジスト膜を乾燥する工程、および第１層レジスト
膜を現像する工程を含むことを特徴とするパター
ン形成方法によつて達成される。(5) Structure of the Invention According to the present invention, in a method for forming a pattern on a pattern forming film provided on a substrate, a first layer resist film sensitive to deep ultraviolet rays is formed on the pattern forming film. forming the first
A step of forming an ultraviolet-sensitive second resist film on the resist film, a step of exposing and developing the second resist film to form a mask pattern, and a step of exposing the first resist film using the mask pattern. This is achieved by a pattern forming method characterized by including the steps of removing the mask pattern, drying the first resist film, and developing the first resist film.
(6) 発明の実施例 以下本発明実施例を図面によつて詳説する。(6) Examples of the invention Embodiments of the present invention will be explained in detail below with reference to the drawings.
先ず第３図に断面図で示す如く（第３図以下に
おいて既に図示した部分と同じ部分は同一符号を
付して表示する）、基板（例えばシリコンウエハ、
ガラスマスク基板）１上にはパターン形成膜
（SiO2膜、窒化膜、Cr膜、CrO膜など）２が形成
されている。なおパターン形成膜２には凹凸があ
るが図には簡明化のため平坦表面をもつ如くにし
て示す。パターン形成膜２の上に遠紫外線感光性
レジスト（例えば前記したODUR−1013）を
1μmの厚さに塗布し、ベークして第１層レジスト
膜３を形成する。次いで前記したAZ−1370また
はOFPR−800なる商品名の紫外線感光性レジス
トを0.5μmの厚さに塗布して第２層レジスト膜４
を作る。ステツパーで露光し、現像すると、第１
図に示される如き第２層レジスト膜４のパターン
が得られる。次いで、遠紫外線のフラツド
（flood）露光を行う。ここまでは従来技術の場合
と同様である。なお第１層レジスト膜３の砂地を
付した部分３ａは感光した部分である。 First, as shown in the cross-sectional view in FIG. 3 (the same parts as those already shown in FIG.
A pattern forming film (SiO 2 film, nitride film, Cr film, CrO film, etc.) 2 is formed on the glass mask substrate (glass mask substrate) 1 . Although the pattern forming film 2 has irregularities, it is shown as having a flat surface for the sake of simplicity. A deep ultraviolet-sensitive resist (for example, the above-mentioned ODUR-1013) is applied on the pattern forming film 2.
The first layer resist film 3 is formed by applying the resist film to a thickness of 1 μm and baking it. Next, a UV-sensitive resist with the trade name AZ-1370 or OFPR-800 described above was applied to a thickness of 0.5 μm to form a second resist film 4.
make. When exposed with a stepper and developed, the first
A pattern of the second layer resist film 4 as shown in the figure is obtained. A flood exposure of deep ultraviolet light is then performed. The process up to this point is the same as in the prior art. Note that the sandy portion 3a of the first resist film 3 is the exposed portion.
次に、基板１をエチルアルコールに浸漬するか
または基板１上に噴霧状のエチルアルコールを吹
き付けて第２層レジスト膜４を除去する（第４
図）。エチルアルコールに代えてアルカリ水溶液
（例えばKOH溶液）を用いてもよい。 Next, the second resist film 4 is removed by immersing the substrate 1 in ethyl alcohol or by spraying atomized ethyl alcohol onto the substrate 1 (the fourth resist film 4 is removed).
figure). An alkaline aqueous solution (eg, KOH solution) may be used instead of ethyl alcohol.
次いで第１層レジスト膜３が乾燥した後に、例
えば東京応化(株)社製のODUR現像液、リンス液
を用いて現像すると第４図に砂地を付した部分が
除去されて第５図に示される如き第１層レジスト
膜３のパターン３ｂが作られ、それをマスクにし
てパターン形成膜２を通常の技術でエツチング
し、パターン形成膜２にパターン２ａを作る（第
６図）。 Next, after the first layer resist film 3 has dried, it is developed using, for example, an ODUR developer manufactured by Tokyo Ohka Co., Ltd. and a rinsing solution, so that the sandy area shown in FIG. 4 is removed, as shown in FIG. 5. A pattern 3b of the first layer resist film 3 as shown in FIG.
上記の方法においては第２層レジスト膜４をエ
チルアルコールで除去することにより、第２層レ
ジストをそのままマスクにして第１層レジストを
パターニングしパターン形成膜２をエツチングす
る従来技術の場合よりも欠陥の少ないパターンを
形成することができ、サブミクロンのオーダーの
微細パターンがパターン形成膜の段差の大なると
ころでも正確に形成されうる。なおレジスト膜は
上記に示したものに限定されるものではない。 In the above method, by removing the second layer resist film 4 with ethyl alcohol, defects can be removed more easily than in the conventional technique in which the first layer resist is patterned using the second layer resist as a mask and the pattern forming film 2 is etched. It is possible to form a pattern with a small amount of noise, and a fine pattern on the order of submicrons can be formed accurately even in a place where the pattern forming film has a large step difference. Note that the resist film is not limited to those shown above.
(7) 発明の効果
以上詳細に説明した如く本発明によれば、微細
パターンが障害なしにウエハ、ガラスマスク基板
等の上のパターン形成膜に形成され、サブミクロ
ンのオーダーのパターンも形成可能となるので、
半導体集積回路の集積度を信頼性良く高めるのに
効果大である。(7) Effects of the Invention As explained in detail above, according to the present invention, fine patterns can be formed on pattern forming films on wafers, glass mask substrates, etc. without any hindrance, and patterns on the order of submicrons can also be formed. So,
This is highly effective in increasing the degree of integration of semiconductor integrated circuits with good reliability.
第１図と第２図は従来技術によるパターン形成
方法を示す断面図、第３図ないし第６図は本発明
のパターン形成方法を示す断面図である。
１…基板、２…パターン形成膜、３…第１層レ
ジスト、４…第２層レジスト。
1 and 2 are cross-sectional views showing a pattern forming method according to the prior art, and FIGS. 3 to 6 are cross-sectional views showing a pattern forming method according to the present invention. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Pattern formation film, 3... First layer resist, 4... Second layer resist.
Claims (1)
ンを形成する方法において、前記パターン形成膜
上に遠紫外線感光性の第１層レジスト膜を形成す
る工程、該第１層レジスト膜上に紫外線感光性の
第２層レジスト膜を形成する工程、該第２レジス
ト膜を露光、現像してマスクパターンを形成する
工程、該マスクパターンにより第１層レジスト膜
を露光する工程、該マスクパターンを除去する工
程、第１層レジスト膜を乾燥する工程、および第
１層レジスト膜を現像する工程を含むことを特徴
とするパターン形成方法。1. In a method of forming a pattern on a pattern forming film provided on a substrate, a step of forming a first layer resist film sensitive to deep ultraviolet rays on the pattern forming film; a step of forming a second layer resist film, a step of exposing and developing the second resist film to form a mask pattern, a step of exposing the first layer resist film with the mask pattern, a step of removing the mask pattern. A pattern forming method comprising the steps of: drying a first resist film; and developing the first resist film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58214499A JPS60106132A (en) | 1983-11-15 | 1983-11-15 | Formation of pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58214499A JPS60106132A (en) | 1983-11-15 | 1983-11-15 | Formation of pattern |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60106132A JPS60106132A (en) | 1985-06-11 |
| JPH0458168B2 true JPH0458168B2 (en) | 1992-09-16 |
Family
ID=16656717
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58214499A Granted JPS60106132A (en) | 1983-11-15 | 1983-11-15 | Formation of pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60106132A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1993000771A1 (en) | 1991-06-27 | 1993-01-07 | Nippon Hoso Kyokai | Sub-sampling transmission system for improving transmitted picture quality in time-varying picture region of wide-band color picture signal |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5636134A (en) * | 1979-09-03 | 1981-04-09 | Oki Electric Ind Co Ltd | Forming method for pattern of semiconductor substrate |
| JPS5834921A (en) * | 1981-08-27 | 1983-03-01 | Nec Corp | Manufacture of semiconductor device |
-
1983
- 1983-11-15 JP JP58214499A patent/JPS60106132A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5636134A (en) * | 1979-09-03 | 1981-04-09 | Oki Electric Ind Co Ltd | Forming method for pattern of semiconductor substrate |
| JPS5834921A (en) * | 1981-08-27 | 1983-03-01 | Nec Corp | Manufacture of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60106132A (en) | 1985-06-11 |
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