JPS6354726A - Method of etching resist film - Google Patents

Method of etching resist film

Info

Publication number
JPS6354726A
JPS6354726A JP61199219A JP19921986A JPS6354726A JP S6354726 A JPS6354726 A JP S6354726A JP 61199219 A JP61199219 A JP 61199219A JP 19921986 A JP19921986 A JP 19921986A JP S6354726 A JPS6354726 A JP S6354726A
Authority
JP
Japan
Prior art keywords
resist film
film
etching
photo
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61199219A
Other languages
Japanese (ja)
Inventor
Hidetoshi Ishiwari
石割 秀敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61199219A priority Critical patent/JPS6354726A/en
Publication of JPS6354726A publication Critical patent/JPS6354726A/en
Pending legal-status Critical Current

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  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Electron Beam Exposure (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To shorten the time of removing a photo-resist film used as a mask by etching the photo-resist film as a lower layer in an anisotropic manner up to predetermined thickness, employing an silicon group resist film formed according to a pattern as a mask, removing the silicon group resist film through etching and continuing the anisotropic etching of the photo-resist film. CONSTITUTION:A photo-resist film 13 is shaped thickly onto a film 11 consisting of a metal such as Al for forming a semiconductor element in order to reduce back scattering at the time of electron-beam exposure, and a resist film 14 for electron-beam exposure is shaped thinly onto the film 13, exposed by electron beams, developed and etched according to a prescribed pattern. The photo-resist film 13 under the film 14 is etched by using oxygen gas as a reaction gas. The silicon group resist film 14 is removed through etching with employing CF4 gas as an etching gas. The photo-resist film 13 as an irregular-shaped first layer is etched by using oxygen gas an etching gas. Since the whole thickness of the photo-resist film 13 as the first layer is also brought to one third of the thickness of the photo-resist film applied at first at that time, the time of the removal of the photo-resist film 13 after etching the wiring film in Al can be shortened.

Description

【発明の詳細な説明】 〔I既要〕 電子ビーム直接露光による高アスペクト比のレジストパ
ターンを二層のレジスト膜を用いて形成する方法であっ
て、ホトレジストI膜上にシリコーン系レジスト膜を所
定のパターンに形成後、このパターン形成されたシリコ
ーン系レジスト膜をマスクとして酸素ガスを反応ガスと
して用いてホトレジスト膜の膜厚の273をエツチング
後、更に四弗化炭素(CF 4 )ガスを用いてシリコ
ーン系レジスト膜をエツチング後、更に酸素ガスを用い
てホトレジスト膜を所定のパターンにエツチングするこ
とで高アスペクト比のレジストパターンを得るようにす
ると共に、へg配線層のような半導体装置形成用被膜を
エツチングした後のホトレジスト膜の除去時間を短縮す
るようにする。
[Detailed Description of the Invention] [I Already Required] A method for forming a resist pattern with a high aspect ratio by direct electron beam exposure using a two-layer resist film, the method comprising: depositing a silicone resist film on a photoresist I film in a predetermined manner; After forming a pattern, the photoresist film was etched to a thickness of 273 mm using the patterned silicone resist film as a mask and oxygen gas as a reactive gas, and then carbon tetrafluoride (CF 4 ) gas was used to etch the photoresist film. After etching the silicone resist film, the photoresist film is further etched into a predetermined pattern using oxygen gas to obtain a resist pattern with a high aspect ratio. To shorten the time required to remove a photoresist film after etching.

〔産業上の利用分野〕[Industrial application field]

本発明はレジスト膜のドライエンチング方法に係り、特
に二層レジスト膜を用いて高アスペクト比のレジストパ
ターンを得る方法に関する。
The present invention relates to a method for dry etching a resist film, and particularly to a method for obtaining a resist pattern with a high aspect ratio using a two-layer resist film.

IC,LSI等の半導体装置を製造する場合、シリコン
(St)等の半導体基板に半導体素子を形成後、この絶
縁膜を介して、この半導体素子間を接続するアルミニウ
ム(All)の配線層を形成し、この〜の配線層上にレ
ジスト膜を形成後、このレジスト膜を露光現像して所定
のパターンに形成後、このパターン形成されたレジスト
膜をマスクとして用いて下の〜の配線層を所定のパター
ンに形成する工程が採られている。
When manufacturing semiconductor devices such as ICs and LSIs, after semiconductor elements are formed on a semiconductor substrate such as silicon (St), a wiring layer of aluminum (All) is formed to connect the semiconductor elements via this insulating film. After forming a resist film on the wiring layer of ~, this resist film is exposed and developed to form a predetermined pattern, and this patterned resist film is used as a mask to form the wiring layer of ~ in a predetermined manner. The process of forming the pattern is adopted.

このレジスト膜を露光現像して所定のパターンに形成す
る方法として、電子ビーム露光の際に〜の配線層に電子
ビームが衝突して後方散乱の現象が発生するのを防止す
る目的で、N配線層上にはホトレジスト膜を分厚く形成
して、N配線層上で段差が無(なるように平坦化し、そ
の上に電子ビームに対して高感度なシリコーン系レジス
ト膜を薄く塗布する。
As a method of exposing and developing this resist film to form a predetermined pattern, in order to prevent the backscattering phenomenon caused by the electron beam colliding with the wiring layer of ~ during electron beam exposure, A thick photoresist film is formed on the layer and flattened so that there are no steps on the N wiring layer, and a silicone resist film that is highly sensitive to electron beams is thinly applied thereon.

そして電子ビームを用いてシリコーン系レジスト19を
露光した後、このレジスl−MUを現像して所定のパタ
ーンに形成し、このパターン形成されたシリコーン系レ
ジスト膜をマスクとして用いてその下のホトレジスト膜
を所定のパターンに形成している。
After exposing the silicone resist 19 using an electron beam, this resist l-MU is developed to form a predetermined pattern, and this patterned silicone resist film is used as a mask to mask the underlying photoresist film. are formed in a predetermined pattern.

ところでこの下層のホトレジスト膜は分厚く形成されて
いるので、サイドエンチが起こ・らないようにして高ア
スペクト比のホトレジスト膜を形成することが望まれ、
かつこのマスクとして用いたホトレジスト膜を除去する
除去時間を短縮させることが望まれている。
By the way, since this lower layer photoresist film is formed thickly, it is desirable to form a photoresist film with a high aspect ratio while preventing side etch.
Furthermore, it is desired to shorten the time required to remove the photoresist film used as the mask.

〔従来の技術〕[Conventional technology]

従来、このような二層構造のレジスト膜をエツチングす
る方法として、第6図に示すように〜等の半導体素子形
成用の被膜1の上に、第1層のホトレジスト膜1を3μ
mの厚さに分厚く形成後、゛その上にシリコーン系レジ
スト膜3を0.1〜0.2μmの厚さに薄く形成する。
Conventionally, as a method for etching such a two-layered resist film, as shown in FIG.
After forming the silicone resist film 3 to a thickness of m, a thin silicone resist film 3 is formed thereon to a thickness of 0.1 to 0.2 μm.

次いで加速電圧が20KeVのエネルギーの電子ビーム
を用いて第2層のシリコーン系レジスト膜3を直接所定
のパターンに露光した後、現像して所定のパターンのシ
リコーン系レジスト膜3を得るようにする。
Next, the second layer silicone resist film 3 is directly exposed in a predetermined pattern using an electron beam having an energy of an accelerating voltage of 20 KeV, and then developed to obtain a silicone resist film 3 in a predetermined pattern.

次イテこのパターン形成されたシリコーン系レジストI
l!ji3をマスクとして用いて、第7図に示すように
、酸素ガスを反応ガスとして用い、周波数が13.56
MHz、出力400Hのトライエツチング装置を用いて
、その下のホトレジスト膜を酸素ガスを反応ガスとして
用いて、連続的に所定のパターンにエツチングしていた
Next step: This patterned silicone resist I
l! Using ji3 as a mask, as shown in Figure 7, oxygen gas was used as the reaction gas and the frequency was 13.56.
Using a tri-etching device with a frequency of MHz and an output of 400 H, the underlying photoresist film was continuously etched into a predetermined pattern using oxygen gas as a reaction gas.

C発明が解決しようとする問題点〕 然し、このような加速電圧が20KeVでシリコーン系
レジスト膜を電子ビーム露光しようとすると、この加速
電圧では、シリコーン系レジスト膜内での電子の散乱が
大きいため、充分な解像度のレジストパターンが出来な
い問題がある。
C Problems to be Solved by the Invention] However, when attempting to expose a silicone-based resist film with an electron beam at such an acceleration voltage of 20 KeV, electrons scattering within the silicone-based resist film is large at this acceleration voltage. , there is a problem that a resist pattern with sufficient resolution cannot be created.

そのため、加速電圧を20KeVより30KeVに上昇
させ、前方散乱分布を狭くし解像度良くシリコーン系レ
ジスト膜を露光しようとすると、この電子ビームの後方
散乱分布が広く生じてシリコーン系レジストM’Jが精
度良く露光されない問題がある。
Therefore, when an attempt is made to increase the acceleration voltage from 20 KeV to 30 KeV to narrow the forward scattering distribution and expose a silicone resist film with good resolution, the back scattering distribution of this electron beam will become wide and the silicone resist M'J will be exposed with high precision. There is a problem with not being exposed.

そこでホトレジスト膜の厚さを厚くして、電子ビームの
後方散乱を防止しようとしたが、このホトレジスト膜を
Nの配線膜のパターン形成の際のマスクとして用いた後
に、エツチング除去するのに時間が掛り過ぎ、作業効率
が悪くなる欠点がある。
Therefore, attempts were made to increase the thickness of the photoresist film to prevent backscattering of the electron beam, but after using this photoresist film as a mask for patterning the N wiring film, it took a long time to remove it by etching. It has the disadvantage that it takes too much time and reduces work efficiency.

本発明は上記した問題点を除去し、電子ビームの後方散
乱によるパターン精度の低下が発生しないように、分厚
くホトレジスト膜を形成した場合に於いても、このホト
レジスト膜7!l<を青変良く高アスペクト比で形成で
きるようにし、かつ半導体素予形成用被膜のマスクとし
て用いた後のホトレジスト膜が、容易にエツチング除去
できる方法の提供を目的とする。
The present invention eliminates the above-mentioned problems and prevents deterioration of pattern accuracy due to backscattering of electron beams, even when a thick photoresist film is formed. It is an object of the present invention to provide a method by which a photoresist film can be formed with good blue discoloration and a high aspect ratio, and a photoresist film after being used as a mask for a film for semiconductor preliminary formation can be easily removed by etching.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のレジスト膜のエツチング方法は、パターン形成
されたシリコーン系レジスト膜をマスクとして第1の反
応ガスを用いて下層のホトレジスト膜を所定の厚さに成
るまで異方性エツチングし、次いで第2の反応ガスを用
いてシリコーン系レジスト膜をエツチング後、更に第1
の反応ガスを用いてホトレジスト膜を、前記半導体素子
形成用被膜に到達するまでエツチングすることを特徴と
する。
In the resist film etching method of the present invention, the underlying photoresist film is anisotropically etched using a first reaction gas using a patterned silicone resist film as a mask until it reaches a predetermined thickness, and then a second etching process is performed. After etching the silicone resist film using a reactive gas of
The method is characterized in that the photoresist film is etched using a reactive gas until it reaches the film for forming a semiconductor element.

〔作用〕[Effect]

本発明のレジスト膜のエツチング方法は、電子ビーム露
光の際の後方散乱を低減するために、八gのような半導
体素子形成用被膜の上にホトレジスト膜を分厚く形成し
、その上に電子ビーム露光用のレジスト膜を薄く形成す
る。
In the resist film etching method of the present invention, in order to reduce backscattering during electron beam exposure, a thick photoresist film is formed on a semiconductor element forming film such as 8g, and then electron beam exposure is performed on the photoresist film. Form a thin resist film for use.

次いでこの電子ビーム露光用レジスト膜を所定のパター
ンに露光後、現像して所定のパターンにエツチングする
。更に酸素ガスを反応ガスとして用いてその下のホトレ
ジスト膜をエツチングする。
Next, this resist film for electron beam exposure is exposed to a predetermined pattern, and then developed and etched into a predetermined pattern. Furthermore, the underlying photoresist film is etched using oxygen gas as a reactive gas.

更にエツチングガスとしてCF4ガスを用いて前記電子
ビーム露光用シリコーン系レジスト膜をエツチング除去
する。
Further, the silicone resist film for electron beam exposure is etched away using CF4 gas as an etching gas.

次いで酸素ガスをエツチングガスとして用いて、電子ビ
ーム露光用レジスト膜が除去され、凹凸形状の第1層の
ホトレジスト膜をエツチングする。
Next, using oxygen gas as an etching gas, the resist film for electron beam exposure is removed, and the unevenly shaped first layer photoresist film is etched.

この時、第1層のホトレジスト膜の全体の厚さも初めに
塗布したホトレジストM’Jの厚さの173の厚さの公
文薄くなる。
At this time, the total thickness of the first layer photoresist film is also reduced by 173 times the thickness of the initially coated photoresist M'J.

そのため、このホトレジスト膜を用いて八Ωの配線膜を
エツチングした後、このホトレジストHを除去する時間
が短縮できる。
Therefore, the time required to remove the photoresist H after etching the 8Ω wiring film using this photoresist film can be shortened.

〔実施例〕〔Example〕

以下、図面を用いて本発明の一実施例につき、詳細に説
明する。
Hereinafter, one embodiment of the present invention will be described in detail using the drawings.

第1図に示すように、〜等の半導体素子形成用被膜11
を形成した基板12上に第1層のホトレジスト1111
3を3μmの厚さに分厚く形成する。
As shown in FIG. 1, a film 11 for forming semiconductor elements such as...
A first layer of photoresist 1111 is formed on the substrate 12 on which
3 is thickly formed to a thickness of 3 μm.

更にその上にネガ型のシリコーン系レジスト膜14を0
.2μmの厚さに形成する。
Furthermore, a negative type silicone resist film 14 is applied on top of it.
.. It is formed to have a thickness of 2 μm.

次いで第2図に示すように、加速電圧30KV、電子ビ
ームを用いてこのシリコーン系レジスト膜14を所定の
パターンに直接露光した後、現像し、所定のパターンの
シリコーン系レジストlj!14を形成する。
Next, as shown in FIG. 2, this silicone resist film 14 is directly exposed in a predetermined pattern using an electron beam at an accelerating voltage of 30 KV, and then developed to form a silicone resist lj! in a predetermined pattern. Form 14.

この場合ホトレジスト膜13が分厚く形成されているの
で、〜等の後方散乱の影習を大きく受けることを避ける
ことができる。
In this case, since the photoresist film 13 is formed thickly, it is possible to avoid being greatly affected by backscattering such as .

次いで第3図に示すように、この基板12を平行平板型
の反応性イオンエツチング装置の容器内に導入し、この
容器内を10’ Lorr以下の真空度に成る迄排気し
た後、酸素ガスをエツチングガス10−′〜10 to
rrの圧力に成るまで導入し、前記パターン形成したシ
リコーン系レジスト!914をマスクとして用いて、そ
の下層のホトレジストH913を、ホトレジスト膜13
の厚さlの2/3迄エツチングする。
Next, as shown in FIG. 3, this substrate 12 was introduced into a container of a parallel plate type reactive ion etching apparatus, and after the inside of this container was evacuated to a degree of vacuum of 10'Lorr or less, oxygen gas was removed. Etching gas 10-' to 10 to
The patterned silicone resist was introduced until the pressure reached rr! 914 as a mask, the underlying photoresist H913 is removed from the photoresist film 13.
Etch to 2/3 of the thickness l.

この場合、ホトレジストl15i!13がエツチングさ
れる速度は、シリコーン系レジスト膜14がエツチング
される速度の40〜50倍のエツチング速度があり、シ
リコーン系レジスト膜14は、0.1 μm程度の厚さ
で残留している。
In this case, photoresist l15i! The etching speed of the silicone resist film 13 is 40 to 50 times the etching speed of the silicone resist film 14, and the silicone resist film 14 remains with a thickness of about 0.1 μm.

次いで第4図に示すように、反応容器内に酸素ガスの供
給を停止した後、CF4ガスを容器内に導入し、シリコ
ーン系レジスト膜14をエツチングする。
Next, as shown in FIG. 4, after stopping the supply of oxygen gas into the reaction vessel, CF4 gas is introduced into the vessel to etch the silicone resist film 14.

ここでCF4ガスによってホトレジスト膜13がエツチ
ングされる速度とシリコーン系レジスト膜14がエツチ
ングされる速度は、殆ど同一であるが、シリコーン系レ
ジスト膜14の厚さは極めて薄いので、ホトレジスト膜
13は殆どエツチングされない。
Here, the speed at which the photoresist film 13 is etched by the CF4 gas and the speed at which the silicone-based resist film 14 is etched are almost the same, but since the thickness of the silicone-based resist film 14 is extremely thin, the photoresist film 13 is almost completely etched. Not etched.

次いで第5図に示すように、容器内へのCF4ガスの供
給を停止し、容器内に酸素ガスを導入し、ホトレジスト
膜13をエツチングして、その下の〜の被膜11が露出
する迄エツチングする。
Next, as shown in FIG. 5, the supply of CF4 gas into the container is stopped, oxygen gas is introduced into the container, and the photoresist film 13 is etched until the film 11 below is exposed. do.

このようにすればホトレジスト膜13の厚さは、初めの
ホトレジスト膜の厚さをlとすると2/3pの厚さとな
り、本実施例のように!の値が3μmであると2μmと
なる。
In this way, the thickness of the photoresist film 13 will be 2/3p, where l is the thickness of the initial photoresist film, as in this embodiment! If the value of is 3 μm, it becomes 2 μm.

そして電子ビーム露光による、シリコーン系レジスト膜
の解像パターン幅を0.2μm〜0.3μmとすると、
アスペクト比が210.2〜210.3 、即ち10〜
6.7の高アスペクト比のホトレジスト膜が得られる。
If the resolution pattern width of the silicone resist film by electron beam exposure is 0.2 μm to 0.3 μm,
Aspect ratio is 210.2~210.3, i.e. 10~
A photoresist film with a high aspect ratio of 6.7 is obtained.

このホトレジスト膜はAZ−1350Jを用いた場合、
酸素プラズマによる剥離速度は100人/分程度で、あ
る。
When this photoresist film is used with AZ-1350J,
The peeling rate using oxygen plasma is about 100 people/minute.

そして従来の方法に比べてホトレジスト膜13の除去速
度は2/3に短縮される。
The removal speed of the photoresist film 13 is reduced to 2/3 compared to the conventional method.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明の方法によれば、電子ビーム
露光の際の後方散乱現象を充分防止できる程度にホトレ
ジスト膜を分厚く形成して、N配線層の表面の平坦化を
行った場合でも、マスクとして使用したホトレジスト膜
の除去工程時間が短縮でき工程が短縮できる効果がある
As described above, according to the method of the present invention, even when the photoresist film is formed thick enough to sufficiently prevent the backscattering phenomenon during electron beam exposure and the surface of the N wiring layer is flattened, This has the effect of shortening the process time for removing the photoresist film used as a mask, thereby shortening the process.

【図面の簡単な説明】[Brief explanation of drawings]

第1図より第5図迄は本発明のレジスト膜のパターン形
成方法の一実施例を工程順に示す断面図、第6図より第
7図迄は従来のレジスl−111のパターン形成方法の
工程を示す断面図である。 図に於いて、 11は〜被膜、12はSi基板、13はホトレジスト膜
、不、LL>スL本匙、ミリコー〉五しシ゛z41す珍
へニオ]A第1図 シリコーンづ?仁シ又H哨1角ノYy−二方5F\゛シ
5第2図 第3図 ジ)コ−>Lし921−171tyrlニー1千〉7−
r孝XrA第4図 芯レソZ4腋グ1硅シク′・XJR;ゴ第5図 作fトシリクー>求しシ”11−鰺運め八′7−〉τり
八〇り第6図
1 to 5 are cross-sectional views showing an embodiment of the resist film pattern forming method of the present invention in the order of steps, and FIGS. 6 to 7 are steps of a conventional resist l-111 pattern forming method. FIG. In the figure, 11 is a film, 12 is a Si substrate, 13 is a photoresist film, and 11 is a silicone film. JinshimataH corner 1 corner Yy-2 way 5F\゛shi5Fig.
r Takashi

Claims (2)

【特許請求の範囲】[Claims] (1)半導体素子形成用被膜(11)を形成した半導体
基板(12)上にホトレジスト膜(13)と、該ホトレ
ジスト膜上にシリコーン系レジスト膜(14)を積層形
成後、該シリコーン系レジスト膜(14)を所定のパタ
ーンに形成し、該パターン形成されたシリコーン系レジ
スト膜(14)をマスクとして、下層のホトレジスト膜
(13)を所定のパターンに形成する場合に於いて、 前記パターン形成されたシリコーン系レジスト膜(14
)をマスクとして第1の反応ガスを用いて下層のホトレ
ジスト膜(13)を所定の厚さに成るまで異方性エッチ
ングし、次いで第2の反応ガスを用いてシリコーン系レ
ジスト膜(14)をエッチング後、更に第1の反応ガス
を用いてホトレジスト膜(13)を、前記半導体素子形
成用被膜(11)に到達するまでエッチングすることを
特徴とするレジスト膜のエッチング方法。
(1) After forming a photoresist film (13) on the semiconductor substrate (12) on which the semiconductor element forming film (11) is formed, and a silicone resist film (14) on the photoresist film, the silicone resist film (14) is formed into a predetermined pattern, and the patterned silicone resist film (14) is used as a mask to form the lower photoresist film (13) into a predetermined pattern. silicone resist film (14
) is used as a mask and the first reactive gas is used to anisotropically etch the lower photoresist film (13) until it reaches a predetermined thickness, and then the silicone-based resist film (14) is etched using the second reactive gas. After etching, the photoresist film (13) is further etched using a first reaction gas until it reaches the semiconductor element forming film (11).
(2)前記第1の反応ガスが酸素ガスで、前記第2の反
応ガスが四弗化炭素ガスを含む弗素系のエッチングガス
であることを特徴とする特許請求の範囲第1項に記載の
レジスト膜のエッチング方法。
(2) The first reactive gas is oxygen gas, and the second reactive gas is a fluorine-based etching gas containing carbon tetrafluoride gas. Etching method for resist film.
JP61199219A 1986-08-25 1986-08-25 Method of etching resist film Pending JPS6354726A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61199219A JPS6354726A (en) 1986-08-25 1986-08-25 Method of etching resist film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61199219A JPS6354726A (en) 1986-08-25 1986-08-25 Method of etching resist film

Publications (1)

Publication Number Publication Date
JPS6354726A true JPS6354726A (en) 1988-03-09

Family

ID=16404119

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61199219A Pending JPS6354726A (en) 1986-08-25 1986-08-25 Method of etching resist film

Country Status (1)

Country Link
JP (1) JPS6354726A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02240914A (en) * 1989-03-15 1990-09-25 Matsushita Electron Corp Formation of pattern
JPH08240913A (en) * 1994-10-12 1996-09-17 Hyundai Electron Ind Co Ltd Formation method of photosensitive film pattern

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02240914A (en) * 1989-03-15 1990-09-25 Matsushita Electron Corp Formation of pattern
JPH08240913A (en) * 1994-10-12 1996-09-17 Hyundai Electron Ind Co Ltd Formation method of photosensitive film pattern

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