JPH0457104B2 - - Google Patents
Info
- Publication number
- JPH0457104B2 JPH0457104B2 JP59245929A JP24592984A JPH0457104B2 JP H0457104 B2 JPH0457104 B2 JP H0457104B2 JP 59245929 A JP59245929 A JP 59245929A JP 24592984 A JP24592984 A JP 24592984A JP H0457104 B2 JPH0457104 B2 JP H0457104B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- holding member
- silicone gel
- coating material
- cap
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59245929A JPS61125055A (ja) | 1984-11-22 | 1984-11-22 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59245929A JPS61125055A (ja) | 1984-11-22 | 1984-11-22 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61125055A JPS61125055A (ja) | 1986-06-12 |
| JPH0457104B2 true JPH0457104B2 (enExample) | 1992-09-10 |
Family
ID=17140949
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59245929A Granted JPS61125055A (ja) | 1984-11-22 | 1984-11-22 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61125055A (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1355351B1 (en) * | 2001-01-23 | 2018-05-23 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
| US6782745B1 (en) * | 2003-02-21 | 2004-08-31 | Visteon Global Technologies, Inc. | Slosh supressor and heat sink |
| JP6292017B2 (ja) * | 2014-05-14 | 2018-03-14 | 日産自動車株式会社 | パワー半導体モジュール及びその製造方法 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59188947A (ja) * | 1983-04-11 | 1984-10-26 | Matsushita Electronics Corp | 樹脂封止形半導体装置の製造方法 |
-
1984
- 1984-11-22 JP JP59245929A patent/JPS61125055A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61125055A (ja) | 1986-06-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6458626B1 (en) | Fabricating method for semiconductor package | |
| JP3454888B2 (ja) | 電子部品ユニット及びその製造方法 | |
| US20050095875A1 (en) | Fabrication method of semiconductor package with heat sink | |
| JP2006509371A (ja) | 露出された集積回路装置を有するパッケージ | |
| US6699731B2 (en) | Substrate of semiconductor package | |
| TW201025464A (en) | Shrink package on board | |
| JPH0613477A (ja) | 露出したダイ面を有する半導体パッケージ | |
| US20020079570A1 (en) | Semiconductor package with heat dissipating element | |
| US20040026776A1 (en) | Microelectronic devices and methods for manufacturing and operating packaged microelectronic device assemblies | |
| EP1889290B1 (en) | Integrated circuit die attach using backside heat spreader | |
| JP3547303B2 (ja) | 半導体装置の製造方法 | |
| JPH0457104B2 (enExample) | ||
| JP3655338B2 (ja) | 樹脂封止型半導体装置及びその製造方法 | |
| CN111739805A (zh) | 半导体封装方法及半导体封装结构 | |
| JP3442721B2 (ja) | 半導体装置 | |
| JP3314574B2 (ja) | 半導体装置の製造方法 | |
| JP2002100722A (ja) | 半導体装置 | |
| JP3543681B2 (ja) | リードフレーム | |
| JPS6129162A (ja) | 半導体装置 | |
| JP3642545B2 (ja) | 樹脂封止型半導体装置 | |
| JPH02105446A (ja) | 混成集積回路 | |
| JPS6132528A (ja) | 半導体装置の製造方法 | |
| JP3541751B2 (ja) | リードフレームとそれを用いた樹脂封止型半導体装置およびその製造方法 | |
| JP2814006B2 (ja) | 電子部品搭載用基板 | |
| JPS6354731A (ja) | 半導体装置 |