JPH0454378B2 - - Google Patents

Info

Publication number
JPH0454378B2
JPH0454378B2 JP58216698A JP21669883A JPH0454378B2 JP H0454378 B2 JPH0454378 B2 JP H0454378B2 JP 58216698 A JP58216698 A JP 58216698A JP 21669883 A JP21669883 A JP 21669883A JP H0454378 B2 JPH0454378 B2 JP H0454378B2
Authority
JP
Japan
Prior art keywords
copper foil
bonding
nickel
copper
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58216698A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60107845A (ja
Inventor
Nobuyuki Mizunoya
Yasuyuki Sugiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP21669883A priority Critical patent/JPS60107845A/ja
Publication of JPS60107845A publication Critical patent/JPS60107845A/ja
Publication of JPH0454378B2 publication Critical patent/JPH0454378B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4839Assembly of a flat lead with an insulating support, e.g. for TAB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/328Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
JP21669883A 1983-11-17 1983-11-17 半導体用回路基板 Granted JPS60107845A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21669883A JPS60107845A (ja) 1983-11-17 1983-11-17 半導体用回路基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21669883A JPS60107845A (ja) 1983-11-17 1983-11-17 半導体用回路基板

Publications (2)

Publication Number Publication Date
JPS60107845A JPS60107845A (ja) 1985-06-13
JPH0454378B2 true JPH0454378B2 (en, 2012) 1992-08-31

Family

ID=16692514

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21669883A Granted JPS60107845A (ja) 1983-11-17 1983-11-17 半導体用回路基板

Country Status (1)

Country Link
JP (1) JPS60107845A (en, 2012)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63160352A (ja) 1986-12-24 1988-07-04 Semiconductor Energy Lab Co Ltd 半導体装置の実装方法
JP3253203B2 (ja) * 1993-01-19 2002-02-04 キヤノン株式会社 フレキシブル配線基板、及びこれを使用したインクジェット記録ヘッドおよびインクジェット記録ヘッドの製造方法
DE19827414C2 (de) * 1998-06-19 2000-05-31 Schulz Harder Juergen Verfahren zum Herstellen eines Metall-Keramik-Substrates

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3766634A (en) * 1972-04-20 1973-10-23 Gen Electric Method of direct bonding metals to non-metallic substrates
JPS6034257B2 (ja) * 1980-05-26 1985-08-07 京セラ株式会社 金の導電層を有する電子部品

Also Published As

Publication number Publication date
JPS60107845A (ja) 1985-06-13

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