JPH0447345B2 - - Google Patents
Info
- Publication number
- JPH0447345B2 JPH0447345B2 JP61297149A JP29714986A JPH0447345B2 JP H0447345 B2 JPH0447345 B2 JP H0447345B2 JP 61297149 A JP61297149 A JP 61297149A JP 29714986 A JP29714986 A JP 29714986A JP H0447345 B2 JPH0447345 B2 JP H0447345B2
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- serial communication
- communication control
- data
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Computer And Data Communications (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61297149A JPS63149751A (ja) | 1986-12-12 | 1986-12-12 | 直接メモリアクセス制御回路の半二重通信方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61297149A JPS63149751A (ja) | 1986-12-12 | 1986-12-12 | 直接メモリアクセス制御回路の半二重通信方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63149751A JPS63149751A (ja) | 1988-06-22 |
| JPH0447345B2 true JPH0447345B2 (enrdf_load_stackoverflow) | 1992-08-03 |
Family
ID=17842834
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61297149A Granted JPS63149751A (ja) | 1986-12-12 | 1986-12-12 | 直接メモリアクセス制御回路の半二重通信方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63149751A (enrdf_load_stackoverflow) |
-
1986
- 1986-12-12 JP JP61297149A patent/JPS63149751A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63149751A (ja) | 1988-06-22 |
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