JPH0444768B2 - - Google Patents

Info

Publication number
JPH0444768B2
JPH0444768B2 JP59037332A JP3733284A JPH0444768B2 JP H0444768 B2 JPH0444768 B2 JP H0444768B2 JP 59037332 A JP59037332 A JP 59037332A JP 3733284 A JP3733284 A JP 3733284A JP H0444768 B2 JPH0444768 B2 JP H0444768B2
Authority
JP
Japan
Prior art keywords
data
input
memory
program controller
condition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59037332A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60183610A (ja
Inventor
Yutaka Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Fuji Facom Corp
Original Assignee
Fuji Electric Co Ltd
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Facom Corp filed Critical Fuji Electric Co Ltd
Priority to JP59037332A priority Critical patent/JPS60183610A/ja
Publication of JPS60183610A publication Critical patent/JPS60183610A/ja
Publication of JPH0444768B2 publication Critical patent/JPH0444768B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/058—Safety, monitoring

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Programmable Controllers (AREA)
  • Tests Of Electronic Circuits (AREA)
JP59037332A 1984-03-01 1984-03-01 プログラムコントロ−ラ試験装置 Granted JPS60183610A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59037332A JPS60183610A (ja) 1984-03-01 1984-03-01 プログラムコントロ−ラ試験装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59037332A JPS60183610A (ja) 1984-03-01 1984-03-01 プログラムコントロ−ラ試験装置

Publications (2)

Publication Number Publication Date
JPS60183610A JPS60183610A (ja) 1985-09-19
JPH0444768B2 true JPH0444768B2 (enrdf_load_stackoverflow) 1992-07-22

Family

ID=12494671

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59037332A Granted JPS60183610A (ja) 1984-03-01 1984-03-01 プログラムコントロ−ラ試験装置

Country Status (1)

Country Link
JP (1) JPS60183610A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS60183610A (ja) 1985-09-19

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