JPH04368140A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH04368140A
JPH04368140A JP3144330A JP14433091A JPH04368140A JP H04368140 A JPH04368140 A JP H04368140A JP 3144330 A JP3144330 A JP 3144330A JP 14433091 A JP14433091 A JP 14433091A JP H04368140 A JPH04368140 A JP H04368140A
Authority
JP
Japan
Prior art keywords
bonding wire
lead frame
bonding
semiconductor chip
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3144330A
Other languages
English (en)
Inventor
Tomoharu Fukuyama
福山 智春
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP3144330A priority Critical patent/JPH04368140A/ja
Publication of JPH04368140A publication Critical patent/JPH04368140A/ja
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • H01L2224/05558Shape in side view conformal layer on a patterned surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4845Details of ball bonds
    • H01L2224/48451Shape
    • H01L2224/48453Shape of the interface with the bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48699Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】
【0001】
【産業上の利用分野】本発明は半導体装置に関する。
【0002】
【従来の技術】通常、半導体装置は、図2に示すように
、半導体素子(図示省略)と、Al等の金属をパターニ
ングして形成して半導体素子に接続した金属配線6を備
え、金属細線(ボンディングワイヤー)7を接着するた
めのボンディングパッド8を金属配線の一領域に備えて
いる半導体チップ3を、リードフレーム2に固着し、リ
ードフレームのリード2aとボンディングパッド8をボ
ンディングワイヤー7で接続し、ボンディングワイヤー
を含め、半導体チップ全体を樹脂1で封止した構造にな
っている。この従来の半導体装置のボンディングパッド
は、図2に示すように、素子間を分離する絶縁膜4の上
に、その絶縁膜に平行な平面型に形成されていた。
【0003】
【発明が解決しようとする課題】上述した従来の半導体
装置のボンディングパッドは、絶縁膜に平行な平面型で
あるため、ボンディングの際球状になったボンディング
ワイヤーの先端が押しつぶされボンディングパッドとボ
ンディングワイヤーとの接触面積が小さくなりボンディ
ングワイヤーの引張り強度が弱くなるという欠点があっ
た。
【0004】
【課題を解決するための手段】本発明の半導体装置は、
リードフレームと、これにダイボンディングされた半導
体チップと半導体チップ上に設けた、中央部にすり鉢状
のくぼみを持つボンディングパッドと、このボンディン
グパッドとリードフレームを接続するボンディングワイ
ヤーと、アルミ配線と、パッシベーション膜と樹脂封止
材と備えている。
【0005】
【実施例】次に、本発明について図面を参照して説明す
る。図1は、本発明の一実施例を示す要部断面図である
。本実施例によれば、半導体装置は、図1に示すように
、リードフレーム2と、これにダンボンディングされた
半導体チップ3と半導体チップ3上に設けた、中央部に
すり鉢状のくぼみを持つボンディングパッド8と、この
ボンディングパッド8とリードフレーム2とを接続する
ボンディングワイヤー7と、アルミ配線6と、パッシベ
ーション膜5と、絶縁膜4と、樹脂封止材1とを含む。
【0006】本実施例によれば、リードフレーム2のリ
ード2aと半導体チップ3とを接続するボンディングワ
イヤー7を接着するボンディングパッド8が、中央部に
すり鉢状のくぼみを有しているので、ボンディングの際
、すり鉢状のくぼみと球状のボンディングワイヤー先端
がしっかり合致し、ボンディングワイヤーの球がつぶさ
れることなく接続されるのでボンディングパッド8とボ
ンディングワイヤー7の接触面積が大きくなり、ボンデ
ィングワイヤーの引張り強度が強くなる。すなわち、半
導体装置の信頼性を著しく向上せしめることができる。
【0007】
【発明の効果】以上説明したように本発明は、従来平面
型であったボンディングパッドの中央部に、すり鉢状の
くぼみを有する構造としたので、ボンディングパッドと
ボンディングワイヤーとの接触面積が大きくなり、ボン
ディングワイヤーの引張り強度を強くすることができ、
半導体装置の信頼性向上に大きな効果をあげることがで
きる。
【図面の簡単な説明】
【図1】本発明の一実施例を示す要部断面図である。
【図2】従来の半導体装置の要部断面図である。
【符号の説明】
1    樹脂封止材 2    リードフレーム 3    半導体チップ 4    絶縁膜 5    パッシベーション膜 6    アルミ配線 7    ボンディングワイヤー 8    ボンディングパット

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】  半導体素子と、金属薄膜で成る金属配
    線とを有する半導体チップをリードフレームに搭載し、
    樹脂で封止した半導体装置において、細い金属線(以降
    ボンディングワイヤーと記す)を接着する金属配線部位
    (以降ボンディングパッドと記す)にすり鉢状のくぼみ
    を設けたことを特徴とした半導体装置。
JP3144330A 1991-06-17 1991-06-17 半導体装置 Pending JPH04368140A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3144330A JPH04368140A (ja) 1991-06-17 1991-06-17 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3144330A JPH04368140A (ja) 1991-06-17 1991-06-17 半導体装置

Publications (1)

Publication Number Publication Date
JPH04368140A true JPH04368140A (ja) 1992-12-21

Family

ID=15359603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3144330A Pending JPH04368140A (ja) 1991-06-17 1991-06-17 半導体装置

Country Status (1)

Country Link
JP (1) JPH04368140A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102019119521A1 (de) * 2019-07-18 2021-01-21 Infineon Technologies Ag Chipgehäuse und verfahren zur herstellung eines chipgehäuses

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102019119521A1 (de) * 2019-07-18 2021-01-21 Infineon Technologies Ag Chipgehäuse und verfahren zur herstellung eines chipgehäuses
US11430669B2 (en) 2019-07-18 2022-08-30 Infineon Technologies Ag Forming a lock structure in a semiconductor chip pad

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