JPH0430179B2 - - Google Patents

Info

Publication number
JPH0430179B2
JPH0430179B2 JP6620483A JP6620483A JPH0430179B2 JP H0430179 B2 JPH0430179 B2 JP H0430179B2 JP 6620483 A JP6620483 A JP 6620483A JP 6620483 A JP6620483 A JP 6620483A JP H0430179 B2 JPH0430179 B2 JP H0430179B2
Authority
JP
Japan
Prior art keywords
layer
silicon substrate
silicon
substrate
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6620483A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59191350A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6620483A priority Critical patent/JPS59191350A/ja
Publication of JPS59191350A publication Critical patent/JPS59191350A/ja
Publication of JPH0430179B2 publication Critical patent/JPH0430179B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
JP6620483A 1983-04-14 1983-04-14 半導体装置の製法 Granted JPS59191350A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6620483A JPS59191350A (ja) 1983-04-14 1983-04-14 半導体装置の製法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6620483A JPS59191350A (ja) 1983-04-14 1983-04-14 半導体装置の製法

Publications (2)

Publication Number Publication Date
JPS59191350A JPS59191350A (ja) 1984-10-30
JPH0430179B2 true JPH0430179B2 (enrdf_load_stackoverflow) 1992-05-21

Family

ID=13309071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6620483A Granted JPS59191350A (ja) 1983-04-14 1983-04-14 半導体装置の製法

Country Status (1)

Country Link
JP (1) JPS59191350A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS59191350A (ja) 1984-10-30

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