JPH0423158U - - Google Patents
Info
- Publication number
- JPH0423158U JPH0423158U JP6273290U JP6273290U JPH0423158U JP H0423158 U JPH0423158 U JP H0423158U JP 6273290 U JP6273290 U JP 6273290U JP 6273290 U JP6273290 U JP 6273290U JP H0423158 U JPH0423158 U JP H0423158U
- Authority
- JP
- Japan
- Prior art keywords
- component mounting
- mounting area
- circuit
- circuit board
- inner layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
Description
第1図は本考案の実施例のプリント配線基板の
構成を示す図、第2図a及びbはこのプリント配
線基板の断面拡大図、第3図aないしeはこのプ
リント配線基板の組立て工程を示す図である。
1……プリント配線基板、1a……部品実装領
域、1b……被外形加工領域、2……回路パター
ン、3a……スリツト、3b……ミシン目穴、4
……テストランド、5……実装部品、7……IV
H、8……内層パターン、9……Vカツト、14
……検査ピン。
Fig. 1 is a diagram showing the configuration of a printed wiring board according to an embodiment of the present invention, Figs. 2 a and b are enlarged cross-sectional views of this printed wiring board, and Figs. 3 a to e show the assembly process of this printed wiring board. FIG. DESCRIPTION OF SYMBOLS 1...Printed wiring board, 1a...Component mounting area, 1b...Outline processing area, 2...Circuit pattern, 3a...Slit, 3b...Perforation hole, 4
...Test land, 5...Mounted parts, 7...IV
H, 8...Inner layer pattern, 9...V cut, 14
...Inspection pin.
Claims (1)
形成される部品実装領域と、 この部品実装領域の周囲に配置され、前記部品
実装領域が製品化される過程で切除される被外形
加工領域と からなる回路基板において、 前記部品実装領域に形成される回路のノードと
接続された該回路の電気検査を行うための接触点
が前記被外形加工領域上に設けられていることを
特徴とする回路基板。 (2) 内層を有する複数層からなる回路基板であ
つて、回路のノードと接触点とが内層パターン及
びビアホールを介して接続されていることを特徴
とする請求項1記載の回路基板。[Claims for Utility Model Registration] (1) A component mounting area in which a predetermined circuit is formed, which is electrically inspected after formation, and a process in which the component mounting area is placed around the component mounting area and the component mounting area is commercialized. A circuit board comprising a region to be processed to be externally cut out and a contact point for electrically inspecting the circuit connected to a node of the circuit formed in the component mounting area is provided on the region to be externally processed. A circuit board characterized by: (2) The circuit board according to claim 1, wherein the circuit board is composed of a plurality of layers having an inner layer, and the nodes of the circuit and the contact points are connected through the inner layer pattern and the via hole.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6273290U JPH0423158U (en) | 1990-06-15 | 1990-06-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6273290U JPH0423158U (en) | 1990-06-15 | 1990-06-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0423158U true JPH0423158U (en) | 1992-02-26 |
Family
ID=31592151
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6273290U Pending JPH0423158U (en) | 1990-06-15 | 1990-06-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0423158U (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH088535A (en) * | 1994-06-16 | 1996-01-12 | Nec Corp | Thin multilayer printed wiring board |
WO2000027173A1 (en) * | 1998-10-30 | 2000-05-11 | Ibiden Co., Ltd. | Test coupon for printed wiring board |
JP2005005692A (en) * | 2003-05-16 | 2005-01-06 | Matsushita Electric Ind Co Ltd | Module with built-in circuit parts and method for manufacturing the same |
JP2011071450A (en) * | 2009-09-28 | 2011-04-07 | Murata Mfg Co Ltd | Method of manufacturing component built-in substrate |
JP2012064869A (en) * | 2010-09-17 | 2012-03-29 | Toshiba Hokuto Electronics Corp | Method of manufacturing flexible printed wiring board |
-
1990
- 1990-06-15 JP JP6273290U patent/JPH0423158U/ja active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH088535A (en) * | 1994-06-16 | 1996-01-12 | Nec Corp | Thin multilayer printed wiring board |
WO2000027173A1 (en) * | 1998-10-30 | 2000-05-11 | Ibiden Co., Ltd. | Test coupon for printed wiring board |
JP2005005692A (en) * | 2003-05-16 | 2005-01-06 | Matsushita Electric Ind Co Ltd | Module with built-in circuit parts and method for manufacturing the same |
JP4509645B2 (en) * | 2003-05-16 | 2010-07-21 | パナソニック株式会社 | Circuit component built-in module and manufacturing method thereof |
JP2011071450A (en) * | 2009-09-28 | 2011-04-07 | Murata Mfg Co Ltd | Method of manufacturing component built-in substrate |
JP2012064869A (en) * | 2010-09-17 | 2012-03-29 | Toshiba Hokuto Electronics Corp | Method of manufacturing flexible printed wiring board |
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