JPH032673U - - Google Patents

Info

Publication number
JPH032673U
JPH032673U JP6303989U JP6303989U JPH032673U JP H032673 U JPH032673 U JP H032673U JP 6303989 U JP6303989 U JP 6303989U JP 6303989 U JP6303989 U JP 6303989U JP H032673 U JPH032673 U JP H032673U
Authority
JP
Japan
Prior art keywords
overglass
component land
conductor pattern
component
exposes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6303989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6303989U priority Critical patent/JPH032673U/ja
Publication of JPH032673U publication Critical patent/JPH032673U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の原理図、第2図は本考案の実
施例の平面図、第3図は従来のHIC基板の説明
図、第4図は従来の改善策の説明図、第5図はパ
ターン切断部の平面図である。 図中、1はセラミツク基板、2は導体パターン
、3は部品ランド、4はオーバガラス、5は部品
、6は部品リード、7は半田、10はオーバガラ
スの窓である。
Fig. 1 is a diagram of the principle of the present invention, Fig. 2 is a plan view of an embodiment of the invention, Fig. 3 is an explanatory diagram of a conventional HIC board, Fig. 4 is an explanatory diagram of a conventional improvement measure, and Fig. 5 is a plan view of a pattern cutting section. In the figure, 1 is a ceramic substrate, 2 is a conductor pattern, 3 is a component land, 4 is an overglass, 5 is a component, 6 is a component lead, 7 is solder, and 10 is a window of the overglass.

Claims (1)

【実用新案登録請求の範囲】 絶縁性基板1の表面に導体パターン2および部
品ランド3を形成し、その表面をオーバガラス4
でカバーする混成集積回路用基板において、 該オーバガラス4に該部品ランド3の一部だけ
を露出させる半田付け用の窓10を形成してなる
ことを特徴とする混成集積回路用基板。
[Claims for Utility Model Registration] A conductor pattern 2 and a component land 3 are formed on the surface of an insulating substrate 1, and the surface is covered with an overglass 4.
A hybrid integrated circuit board comprising: a soldering window 10 that exposes only a part of the component land 3 in the overglass 4.
JP6303989U 1989-05-31 1989-05-31 Pending JPH032673U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6303989U JPH032673U (en) 1989-05-31 1989-05-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6303989U JPH032673U (en) 1989-05-31 1989-05-31

Publications (1)

Publication Number Publication Date
JPH032673U true JPH032673U (en) 1991-01-11

Family

ID=31592737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6303989U Pending JPH032673U (en) 1989-05-31 1989-05-31

Country Status (1)

Country Link
JP (1) JPH032673U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61296795A (en) * 1985-06-26 1986-12-27 沖電気工業株式会社 Thick film circuit pattern
JPS63177582A (en) * 1987-01-19 1988-07-21 太陽誘電株式会社 Manufacture of hybrid integrated circuit device
JPS63261789A (en) * 1987-04-20 1988-10-28 株式会社日立製作所 Glass ceramic circuit substrate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61296795A (en) * 1985-06-26 1986-12-27 沖電気工業株式会社 Thick film circuit pattern
JPS63177582A (en) * 1987-01-19 1988-07-21 太陽誘電株式会社 Manufacture of hybrid integrated circuit device
JPS63261789A (en) * 1987-04-20 1988-10-28 株式会社日立製作所 Glass ceramic circuit substrate

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