JPS6355468U - - Google Patents
Info
- Publication number
- JPS6355468U JPS6355468U JP14750986U JP14750986U JPS6355468U JP S6355468 U JPS6355468 U JP S6355468U JP 14750986 U JP14750986 U JP 14750986U JP 14750986 U JP14750986 U JP 14750986U JP S6355468 U JPS6355468 U JP S6355468U
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- conductor patterns
- substrate
- conductor pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 3
- 238000005476 soldering Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図は本考案一実施例の部分説明図。第２図
は上記実施例の導体パターンの図形説明図。第３
図は従来例の部分拡大斜視図。
１Ａ，１Ｂ…端子、１Ａ′，１Ｂ′…端子の接
続されるべき位置の輪郭、２…フラツトパツク形
の集積回路、３…基板、４Ａ，４Ｂ…端子が接続
される部分の導体パターン、４′…従来形成され
ていた導体パターンの輪郭、Ａ…従来例による導
体パターンの間隔、Ｂ…本実施例による導体パタ
ーンの間隔、Ｌ…導体パターンのピツチ。
FIG. 1 is a partial explanatory diagram of an embodiment of the present invention. FIG. 2 is a graphical explanatory diagram of the conductor pattern of the above embodiment. Third
The figure is a partially enlarged perspective view of a conventional example. 1A, 1B...Terminals, 1A', 1B'...Contours of positions where the terminals are to be connected, 2...Flatpack integrated circuit, 3...Substrate, 4A, 4B...Conductor pattern of the portion to which the terminals are connected, 4' . . . Outline of a conventionally formed conductor pattern, A. Spacing of the conductor pattern according to the conventional example, B. Spacing of the conductor pattern according to the present embodiment, L. Pitch of the conductor pattern.
Claims (1)
品の端子が取付けられる複数の導体パターンと を備えた印刷配線板において、 この導体パターンの少なくとも半田付けされる
部分が、隣接する導体パターンの側辺と互いに平
行な波形状に形成されたことを特徴とする 印刷配線板。[Claims for Utility Model Registration] A printed wiring board comprising an insulating substrate and a plurality of conductor patterns formed on the surface of the substrate to which component terminals are attached by soldering, What is claimed is: 1. A printed wiring board characterized in that a portion of the printed wiring board is formed in a wavy shape parallel to the side edges of adjacent conductor patterns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14750986U JPS6355468U (en) | 1986-09-25 | 1986-09-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14750986U JPS6355468U (en) | 1986-09-25 | 1986-09-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6355468U true JPS6355468U (en) | 1988-04-13 |
Family
ID=31060936
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14750986U Pending JPS6355468U (en) | 1986-09-25 | 1986-09-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6355468U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007156448A (en) * | 2005-12-07 | 2007-06-21 | Lg Phillips Lcd Co Ltd | Liquid crystal display device |
-
1986
- 1986-09-25 JP JP14750986U patent/JPS6355468U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007156448A (en) * | 2005-12-07 | 2007-06-21 | Lg Phillips Lcd Co Ltd | Liquid crystal display device |
| JP4554584B2 (en) * | 2005-12-07 | 2010-09-29 | エルジー ディスプレイ カンパニー リミテッド | Liquid crystal display |
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