JPS642470U - - Google Patents
Info
- Publication number
- JPS642470U JPS642470U JP9589487U JP9589487U JPS642470U JP S642470 U JPS642470 U JP S642470U JP 9589487 U JP9589487 U JP 9589487U JP 9589487 U JP9589487 U JP 9589487U JP S642470 U JPS642470 U JP S642470U
- Authority
- JP
- Japan
- Prior art keywords
- land
- wiring board
- printed wiring
- auxiliary
- lands
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005476 soldering Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図は本実施例のプリント配線基板のＩＣ実
装状態を示す斜視図、第２図は従来品の斜視図、
第３図は従来品の半田付け状態を示す側面図、第
４図は半田付け後の従来品を示す側面図、第５図
は本実施例のランドを示す平面図、第６図は半田
付け後の側面図、第７図はランドの他の実施例を
示す平面図である。
１……ミニフラツトＩＣ、１ａ，１ｂ……リー
ド、２……プリント配線基板、３ａ，３ｂ……終
端ランド、４ａ，４ｂ……補助ランド、６……半
田ブリツジ、８，９……回路パターン。
Fig. 1 is a perspective view showing the IC mounting state of the printed wiring board of this embodiment, Fig. 2 is a perspective view of a conventional product,
Fig. 3 is a side view showing the soldering state of the conventional product, Fig. 4 is a side view showing the conventional product after soldering, Fig. 5 is a plan view showing the land of this embodiment, and Fig. 6 is the soldering state. The later side view, FIG. 7, is a plan view showing another embodiment of the land. 1... Mini flat IC, 1a, 1b... Lead, 2... Printed wiring board, 3a, 3b... Termination land, 4a, 4b... Auxiliary land, 6... Solder bridge, 8, 9... Circuit pattern.
Claims (1)
れるランドを有するプリント配線基板において、 終端ランドの隣りにリード間隔とほぼ同じ間隔
で一対の補助ランドを設け、 各補助ランドと終端ランドとを１本以上の回路
パターンで接続したこと、 を特徴とするプリント配線基板。[Scope of Claim for Utility Model Registration] In a printed wiring board having lands to which leads on both sides of a mini-flat IC, etc. are soldered, a pair of auxiliary lands are provided next to the terminal land at approximately the same spacing as the lead spacing, and each auxiliary land and A printed wiring board characterized by connecting a terminal land with one or more circuit patterns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9589487U JPS642470U (en) | 1987-06-24 | 1987-06-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9589487U JPS642470U (en) | 1987-06-24 | 1987-06-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS642470U true JPS642470U (en) | 1989-01-09 |
Family
ID=31320638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9589487U Pending JPS642470U (en) | 1987-06-24 | 1987-06-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS642470U (en) |
-
1987
- 1987-06-24 JP JP9589487U patent/JPS642470U/ja active Pending
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