JPS61131871U - - Google Patents

Info

Publication number
JPS61131871U
JPS61131871U JP1543085U JP1543085U JPS61131871U JP S61131871 U JPS61131871 U JP S61131871U JP 1543085 U JP1543085 U JP 1543085U JP 1543085 U JP1543085 U JP 1543085U JP S61131871 U JPS61131871 U JP S61131871U
Authority
JP
Japan
Prior art keywords
chip component
mounting area
component mounting
resist layer
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1543085U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1543085U priority Critical patent/JPS61131871U/ja
Publication of JPS61131871U publication Critical patent/JPS61131871U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路基板を示す断
面図、第2図はその上面図である。 1……基板、2……導体パターン、3……チツ
プ部品搭載部、4……ソルダレジスト層、5……
チツプ部品。
FIG. 1 is a sectional view showing a circuit board according to an embodiment of the present invention, and FIG. 2 is a top view thereof. DESCRIPTION OF SYMBOLS 1... Board, 2... Conductor pattern, 3... Chip component mounting part, 4... Solder resist layer, 5...
Chip parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板表面に形成された導体パターン上へチツプ
部品搭載部その他の半田付けを要する部分を除い
てソルダレジスト層を形成し、前記チツプ部品搭
載部にチツプ部品を搭載させてなる回路基板にお
いて、少なくとも前記チツプ部品搭載部周辺のソ
ルダレジスト層の膜厚をチツプ部品のマウントず
れを抑止するに十分な厚さとしたことを特徴とす
る回路基板。
A circuit board in which a solder resist layer is formed on the conductive pattern formed on the surface of the board except for the chip component mounting area and other parts requiring soldering, and the chip component is mounted on the chip component mounting area, at least the above-mentioned A circuit board characterized in that the thickness of the solder resist layer around the chip component mounting area is made thick enough to prevent the chip components from being mounted misaligned.
JP1543085U 1985-02-06 1985-02-06 Pending JPS61131871U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1543085U JPS61131871U (en) 1985-02-06 1985-02-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1543085U JPS61131871U (en) 1985-02-06 1985-02-06

Publications (1)

Publication Number Publication Date
JPS61131871U true JPS61131871U (en) 1986-08-18

Family

ID=30501269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1543085U Pending JPS61131871U (en) 1985-02-06 1985-02-06

Country Status (1)

Country Link
JP (1) JPS61131871U (en)

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