JPS62196377U - - Google Patents
Info
- Publication number
- JPS62196377U JPS62196377U JP8517486U JP8517486U JPS62196377U JP S62196377 U JPS62196377 U JP S62196377U JP 8517486 U JP8517486 U JP 8517486U JP 8517486 U JP8517486 U JP 8517486U JP S62196377 U JPS62196377 U JP S62196377U
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- conductor pattern
- solder
- solder pad
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図は従来のはんだパツド上に部品を搭載し
た状態を示す模式的平面図である。第２図は第１
図のはんだパツドにはんだをリフローした状態を
示す平面図である。第３図は本考案に基づくはん
だパツド上に部品を搭載した状態を示す平面図で
ある。第４図は第３図のはんだパツドにはんだを
リフローした状態を示す平面図である。
１…絶縁基板、２…はんだパツド、３…搭載電
子部品、４…はんだ、５…露出部分、６…はんだ
パツド、７…隅部、８…はんだ。
FIG. 1 is a schematic plan view showing a state in which components are mounted on a conventional solder pad. Figure 2 is the first
FIG. 3 is a plan view showing a state in which solder is reflowed onto the solder pad shown in the figure. FIG. 3 is a plan view showing a state in which components are mounted on a solder pad according to the present invention. FIG. 4 is a plan view showing a state in which solder is reflowed onto the solder pad of FIG. 3. DESCRIPTION OF SYMBOLS 1...Insulating board, 2...Solder pad, 3...Mounted electronic component, 4...Solder, 5...Exposed portion, 6...Solder pad, 7...Corner, 8...Solder.
Claims (1)
形成し、該導体パターンの一部に部品を搭載する
ためのはんだパツド部を設けてなる配線基板に於
て、 前記はんだパツドの隅部に丸みがつけられてい
ることを特徴とする配線基板。[Scope of Claim for Utility Model Registration] In a wiring board comprising a conductor pattern made of a thick film conductor formed on an insulating substrate, and a solder pad portion for mounting a component on a part of the conductor pattern, the above-mentioned: A wiring board characterized by rounded corners of the solder pads.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8517486U JPS62196377U (en) | 1986-06-04 | 1986-06-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8517486U JPS62196377U (en) | 1986-06-04 | 1986-06-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62196377U true JPS62196377U (en) | 1987-12-14 |
Family
ID=30940338
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8517486U Pending JPS62196377U (en) | 1986-06-04 | 1986-06-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62196377U (en) |
-
1986
- 1986-06-04 JP JP8517486U patent/JPS62196377U/ja active Pending
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