JPH0421896B2 - - Google Patents

Info

Publication number
JPH0421896B2
JPH0421896B2 JP60015891A JP1589185A JPH0421896B2 JP H0421896 B2 JPH0421896 B2 JP H0421896B2 JP 60015891 A JP60015891 A JP 60015891A JP 1589185 A JP1589185 A JP 1589185A JP H0421896 B2 JPH0421896 B2 JP H0421896B2
Authority
JP
Japan
Prior art keywords
entry
data
pointer
identifier
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60015891A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61175747A (ja
Inventor
Hajime Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP60015891A priority Critical patent/JPS61175747A/ja
Publication of JPS61175747A publication Critical patent/JPS61175747A/ja
Publication of JPH0421896B2 publication Critical patent/JPH0421896B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
JP60015891A 1985-01-30 1985-01-30 デ−タ転送制御方式 Granted JPS61175747A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60015891A JPS61175747A (ja) 1985-01-30 1985-01-30 デ−タ転送制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60015891A JPS61175747A (ja) 1985-01-30 1985-01-30 デ−タ転送制御方式

Publications (2)

Publication Number Publication Date
JPS61175747A JPS61175747A (ja) 1986-08-07
JPH0421896B2 true JPH0421896B2 (enrdf_load_stackoverflow) 1992-04-14

Family

ID=11901409

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60015891A Granted JPS61175747A (ja) 1985-01-30 1985-01-30 デ−タ転送制御方式

Country Status (1)

Country Link
JP (1) JPS61175747A (enrdf_load_stackoverflow)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833972B2 (ja) * 1979-11-12 1983-07-23 富士通株式会社 計算機システム間通信方式
JPS6051751B2 (ja) * 1980-03-24 1985-11-15 日本電信電話株式会社 通信制御装置
JPS58170254A (ja) * 1982-03-31 1983-10-06 Fujitsu Ltd デ−タ受信制御方式

Also Published As

Publication number Publication date
JPS61175747A (ja) 1986-08-07

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term