JPH0417599B2 - - Google Patents

Info

Publication number
JPH0417599B2
JPH0417599B2 JP59112968A JP11296884A JPH0417599B2 JP H0417599 B2 JPH0417599 B2 JP H0417599B2 JP 59112968 A JP59112968 A JP 59112968A JP 11296884 A JP11296884 A JP 11296884A JP H0417599 B2 JPH0417599 B2 JP H0417599B2
Authority
JP
Japan
Prior art keywords
switch control
control memory
connection
semi
time slot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59112968A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60257699A (ja
Inventor
Haruyoshi Kyohisa
Jusuke Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11296884A priority Critical patent/JPS60257699A/ja
Publication of JPS60257699A publication Critical patent/JPS60257699A/ja
Publication of JPH0417599B2 publication Critical patent/JPH0417599B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
JP11296884A 1984-06-04 1984-06-04 時分割スイツチ制御装置 Granted JPS60257699A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11296884A JPS60257699A (ja) 1984-06-04 1984-06-04 時分割スイツチ制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11296884A JPS60257699A (ja) 1984-06-04 1984-06-04 時分割スイツチ制御装置

Publications (2)

Publication Number Publication Date
JPS60257699A JPS60257699A (ja) 1985-12-19
JPH0417599B2 true JPH0417599B2 (enEXAMPLES) 1992-03-26

Family

ID=14600052

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11296884A Granted JPS60257699A (ja) 1984-06-04 1984-06-04 時分割スイツチ制御装置

Country Status (1)

Country Link
JP (1) JPS60257699A (enEXAMPLES)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63220695A (ja) * 1987-03-09 1988-09-13 Nec Corp 時分割回線交換機における半固定回線収容方式

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5657386A (en) * 1979-10-17 1981-05-19 Nec Corp Time-division switch

Also Published As

Publication number Publication date
JPS60257699A (ja) 1985-12-19

Similar Documents

Publication Publication Date Title
US5260937A (en) Power conserving technique for a communications terminal time slot interchanger
JPH0417599B2 (enEXAMPLES)
CA2062562A1 (en) Switch coupled between input and output ports in communication system
JPH0715670B2 (ja) デ−タ処理装置
JPS5895492A (ja) 時分割スイツチ制御装置
JPS60138664A (ja) 所要デ−タバス幅の異なる装置群のためのデ−タバス方式
JP3028036B2 (ja) 通話路構成方式
JPS60137197A (ja) 通話路根定接続方式
JPH0139277B2 (enEXAMPLES)
SU1608746A1 (ru) Запоминающее устройство
JP2758004B2 (ja) データ転送方法及び装置
JP3123929B2 (ja) データ蓄積再生システム
JP2674003B2 (ja) 時分割スイツチ制御メモリーコピー方式
JP2806550B2 (ja) 二方向ポートｒａｍの調整回路
KR100214945B1 (ko) 이중화된 메인프로세서를 가지는 vms/ars 시스템의 안내음 송출 장치
JP2636253B2 (ja) 拡張バス方式
JPH0222938A (ja) タイムスロット切替方法
JPS638500B2 (enEXAMPLES)
JPH0120463B2 (enEXAMPLES)
JPH0773140A (ja) 共用レジスタの回路構造およびそのデータ伝送方法
JPS5923677B2 (ja) 交換処理装置の二重化方式
JPS596554B2 (ja) 遠隔局処理装置初期設定方式
JPS58225761A (ja) 熱予備方式
JPH04170834A (ja) データ伝送制御システム
JPS6386054A (ja) メモリ方式