JPH0376616B2 - - Google Patents

Info

Publication number
JPH0376616B2
JPH0376616B2 JP59043095A JP4309584A JPH0376616B2 JP H0376616 B2 JPH0376616 B2 JP H0376616B2 JP 59043095 A JP59043095 A JP 59043095A JP 4309584 A JP4309584 A JP 4309584A JP H0376616 B2 JPH0376616 B2 JP H0376616B2
Authority
JP
Japan
Prior art keywords
transmission path
signal
node
loop
monitoring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59043095A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60187160A (ja
Inventor
Hidekazu Tsutsui
Takashi Tazaki
Susumu Tominaga
Ichiro Iida
Akira Takeyama
Satoshi Nojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59043095A priority Critical patent/JPS60187160A/ja
Publication of JPS60187160A publication Critical patent/JPS60187160A/ja
Publication of JPH0376616B2 publication Critical patent/JPH0376616B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/437—Ring fault isolation or reconfiguration

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
JP59043095A 1984-03-07 1984-03-07 ル−プ伝送路障害通知方式 Granted JPS60187160A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59043095A JPS60187160A (ja) 1984-03-07 1984-03-07 ル−プ伝送路障害通知方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59043095A JPS60187160A (ja) 1984-03-07 1984-03-07 ル−プ伝送路障害通知方式

Publications (2)

Publication Number Publication Date
JPS60187160A JPS60187160A (ja) 1985-09-24
JPH0376616B2 true JPH0376616B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-12-06

Family

ID=12654272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59043095A Granted JPS60187160A (ja) 1984-03-07 1984-03-07 ル−プ伝送路障害通知方式

Country Status (1)

Country Link
JP (1) JPS60187160A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5023872A (en) * 1988-03-25 1991-06-11 Advanced Micro Devices, Inc. FDDI bit error rate tester
JP2762579B2 (ja) * 1989-06-29 1998-06-04 株式会社明電舎 伝送装置のループバック方式
JP2513919B2 (ja) * 1990-09-05 1996-07-10 株式会社日立製作所 構成制御装置の再構成機能停止防止方式

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5018332A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-06-11 1975-02-26
JPS5261407A (en) * 1975-11-14 1977-05-20 Matsushita Electric Ind Co Ltd Transmission equipment
JPS57212848A (en) * 1981-06-25 1982-12-27 Fujitsu Ltd Loop back control system
JPS58145255A (ja) * 1982-02-23 1983-08-30 Nec Corp デイジタルル−プ伝送方式

Also Published As

Publication number Publication date
JPS60187160A (ja) 1985-09-24

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