JPH0371659B2 - - Google Patents
Info
- Publication number
- JPH0371659B2 JPH0371659B2 JP56189333A JP18933381A JPH0371659B2 JP H0371659 B2 JPH0371659 B2 JP H0371659B2 JP 56189333 A JP56189333 A JP 56189333A JP 18933381 A JP18933381 A JP 18933381A JP H0371659 B2 JPH0371659 B2 JP H0371659B2
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- wiring pattern
- end point
- defect
- determined
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000007547 defect Effects 0.000 claims description 40
- 238000000034 method Methods 0.000 claims description 39
- 238000012545 processing Methods 0.000 claims description 16
- 238000003384 imaging method Methods 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 5
- 230000015654 memory Effects 0.000 description 27
- 238000010586 diagram Methods 0.000 description 19
- 238000007689 inspection Methods 0.000 description 6
- 230000002950 deficient Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000006743 Boord olefin synthesis reaction Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
Landscapes
- Image Analysis (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Image Processing (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56189333A JPS5892869A (ja) | 1981-11-27 | 1981-11-27 | 配線パターンの欠陥判定方法およびその装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56189333A JPS5892869A (ja) | 1981-11-27 | 1981-11-27 | 配線パターンの欠陥判定方法およびその装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5892869A JPS5892869A (ja) | 1983-06-02 |
| JPH0371659B2 true JPH0371659B2 (enrdf_load_stackoverflow) | 1991-11-14 |
Family
ID=16239583
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56189333A Granted JPS5892869A (ja) | 1981-11-27 | 1981-11-27 | 配線パターンの欠陥判定方法およびその装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5892869A (enrdf_load_stackoverflow) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3347645C1 (de) * | 1983-12-30 | 1985-10-10 | Dr.-Ing. Ludwig Pietzsch Gmbh & Co, 7505 Ettlingen | Verfahren und Einrichtung zum opto-elektronischen Pruefen eines Flaechenmusters an einem Objekt |
| IT1236980B (it) * | 1989-12-22 | 1993-05-12 | Sgs Thomson Microelectronics | Cella di memoria eprom non volatile a gate divisa e processo ad isolamento di campo autoallineato per l'ottenimento della cella suddetta |
-
1981
- 1981-11-27 JP JP56189333A patent/JPS5892869A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5892869A (ja) | 1983-06-02 |
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