JPS5892869A - 配線パターンの欠陥判定方法およびその装置 - Google Patents

配線パターンの欠陥判定方法およびその装置

Info

Publication number
JPS5892869A
JPS5892869A JP56189333A JP18933381A JPS5892869A JP S5892869 A JPS5892869 A JP S5892869A JP 56189333 A JP56189333 A JP 56189333A JP 18933381 A JP18933381 A JP 18933381A JP S5892869 A JPS5892869 A JP S5892869A
Authority
JP
Japan
Prior art keywords
pattern
circuit
signal
wiring pattern
end point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56189333A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0371659B2 (enrdf_load_stackoverflow
Inventor
Yutaka Sako
裕 酒匂
Seiji Kashiwazaki
柏崎　誠治
Haruo Yoda
晴夫 依田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56189333A priority Critical patent/JPS5892869A/ja
Publication of JPS5892869A publication Critical patent/JPS5892869A/ja
Publication of JPH0371659B2 publication Critical patent/JPH0371659B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Image Analysis (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Image Processing (AREA)
JP56189333A 1981-11-27 1981-11-27 配線パターンの欠陥判定方法およびその装置 Granted JPS5892869A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56189333A JPS5892869A (ja) 1981-11-27 1981-11-27 配線パターンの欠陥判定方法およびその装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56189333A JPS5892869A (ja) 1981-11-27 1981-11-27 配線パターンの欠陥判定方法およびその装置

Publications (2)

Publication Number Publication Date
JPS5892869A true JPS5892869A (ja) 1983-06-02
JPH0371659B2 JPH0371659B2 (enrdf_load_stackoverflow) 1991-11-14

Family

ID=16239583

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56189333A Granted JPS5892869A (ja) 1981-11-27 1981-11-27 配線パターンの欠陥判定方法およびその装置

Country Status (1)

Country Link
JP (1) JPS5892869A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60215286A (ja) * 1983-12-30 1985-10-28 ピーツシュ、アクチエンゲゼルシャフト 対象物における面模様をオプトエレクトロニクス検査する方法とその装置
US5241499A (en) * 1989-12-22 1993-08-31 Sgs-Thomson Microelectronics S.R.L. Non-volatile split gate eprom memory cell and self-aligned field insulation process for obtaining the above cell

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60215286A (ja) * 1983-12-30 1985-10-28 ピーツシュ、アクチエンゲゼルシャフト 対象物における面模様をオプトエレクトロニクス検査する方法とその装置
US5241499A (en) * 1989-12-22 1993-08-31 Sgs-Thomson Microelectronics S.R.L. Non-volatile split gate eprom memory cell and self-aligned field insulation process for obtaining the above cell
US5330938A (en) * 1989-12-22 1994-07-19 Sgs-Thomson Microelectronics S.R.L. Method of making non-volatile split gate EPROM memory cell and self-aligned field insulation

Also Published As

Publication number Publication date
JPH0371659B2 (enrdf_load_stackoverflow) 1991-11-14

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