JPH0370411B2 - - Google Patents

Info

Publication number
JPH0370411B2
JPH0370411B2 JP57142527A JP14252782A JPH0370411B2 JP H0370411 B2 JPH0370411 B2 JP H0370411B2 JP 57142527 A JP57142527 A JP 57142527A JP 14252782 A JP14252782 A JP 14252782A JP H0370411 B2 JPH0370411 B2 JP H0370411B2
Authority
JP
Japan
Prior art keywords
signal
circuit
delay
output
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57142527A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5932216A (ja
Inventor
Seiichiro Iwase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP57142527A priority Critical patent/JPS5932216A/ja
Priority to DE8383304727T priority patent/DE3374236D1/de
Priority to AT83304727T priority patent/ATE30484T1/de
Priority to EP83304727A priority patent/EP0101318B1/en
Priority to CA000434737A priority patent/CA1196105A/en
Priority to US06/524,079 priority patent/US4611305A/en
Publication of JPS5932216A publication Critical patent/JPS5932216A/ja
Publication of JPH0370411B2 publication Critical patent/JPH0370411B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/15Correlation function computation including computation of convolution operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443Sum of products
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/06Non-recursive filters
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/386Special constructional features
    • G06F2207/388Skewing
JP57142527A 1982-07-18 1982-08-17 ディジタル信号処理回路及びディジタルフィルタ Granted JPS5932216A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP57142527A JPS5932216A (ja) 1982-08-17 1982-08-17 ディジタル信号処理回路及びディジタルフィルタ
DE8383304727T DE3374236D1 (en) 1982-08-17 1983-08-15 Digital filters
AT83304727T ATE30484T1 (de) 1982-08-17 1983-08-15 Digitale filter.
EP83304727A EP0101318B1 (en) 1982-08-17 1983-08-15 Digital filters
CA000434737A CA1196105A (en) 1982-08-17 1983-08-16 Variable digital signal processing circuit
US06/524,079 US4611305A (en) 1982-07-18 1983-08-17 Digital signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57142527A JPS5932216A (ja) 1982-08-17 1982-08-17 ディジタル信号処理回路及びディジタルフィルタ

Publications (2)

Publication Number Publication Date
JPS5932216A JPS5932216A (ja) 1984-02-21
JPH0370411B2 true JPH0370411B2 (ru) 1991-11-07

Family

ID=15317426

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57142527A Granted JPS5932216A (ja) 1982-07-18 1982-08-17 ディジタル信号処理回路及びディジタルフィルタ

Country Status (6)

Country Link
US (1) US4611305A (ru)
EP (1) EP0101318B1 (ru)
JP (1) JPS5932216A (ru)
AT (1) ATE30484T1 (ru)
CA (1) CA1196105A (ru)
DE (1) DE3374236D1 (ru)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4544945A (en) * 1983-06-07 1985-10-01 Rca Corporation Logarithmic color matrix for a digital television receiver
US4760540A (en) * 1984-11-29 1988-07-26 Rca Corporation Adaptive interference cancelling system and method
US4694416A (en) * 1985-02-25 1987-09-15 General Electric Company VLSI programmable digital signal processor
US4809209A (en) * 1985-08-26 1989-02-28 Rockwell International Corporation Mybrid charge-transfer-device filter structure
JPS62220231A (ja) * 1986-03-20 1987-09-28 Aisin Seiki Co Ltd ポリvプ−リ・フランジ先端部成形方法
US4887233A (en) * 1986-03-31 1989-12-12 American Telephone And Telegraph Company, At&T Bell Laboratories Pipeline arithmetic adder and multiplier
GB8612453D0 (en) * 1986-05-22 1986-07-02 Inmos Ltd Multistage digital signal multiplication & addition
US4791600A (en) * 1986-07-28 1988-12-13 Tektronix, Inc. Digital pipelined heterodyne circuit
US5077677A (en) * 1989-06-12 1991-12-31 Westinghouse Electric Corp. Probabilistic inference gate
DE4036455C1 (ru) * 1990-11-15 1992-04-02 Siemens Ag, 8000 Muenchen, De
US5627776A (en) * 1991-01-31 1997-05-06 Sony Corporation Data processing circuit
JPH04245535A (ja) * 1991-01-31 1992-09-02 Sony Corp 演算回路
US5349676A (en) * 1991-02-11 1994-09-20 General Electric Company Data acquisition systems with programmable bit-serial digital signal processors
US5367691A (en) * 1991-04-15 1994-11-22 Motorola, Inc. Pipe-staggered apparatus and method utilizing carry look-ahead signal processing
KR0142803B1 (ko) * 1993-09-02 1998-07-15 모리시다 요이치 신호처리장치
US6205459B1 (en) * 1996-12-18 2001-03-20 Yamaha Corporation Digital signal processor and digital signal processing system incorporating same
US6298369B1 (en) 1998-09-30 2001-10-02 Stmicroelectronics, Inc. High speed multiplier
US6427159B1 (en) * 1999-08-03 2002-07-30 Koninklijke Philips Electronics N.V. Arithmetic unit, digital signal processor, method of scheduling multiplication in an arithmetic unit, method of selectively delaying adding and method of selectively adding during a first or second clock cycle
JP3414336B2 (ja) * 1999-11-04 2003-06-09 日本電気株式会社 Firフィルタ、ランプアップ・ランプダウン回路
EP2602809B1 (en) * 2010-08-06 2018-01-24 Shimadzu Corporation Quadrupole-type mass spectrometer apparatus
US11422803B2 (en) * 2020-01-07 2022-08-23 SK Hynix Inc. Processing-in-memory (PIM) device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141510A (en) * 1981-02-26 1982-09-01 Mazda Motor Corp Display device for car
JPS57142054A (en) * 1981-02-27 1982-09-02 Nec Corp Dispatching telephone system

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3805037A (en) * 1972-02-22 1974-04-16 J Ellison N{40 th power galois linear gate
US4344148A (en) * 1977-06-17 1982-08-10 Texas Instruments Incorporated System using digital filter for waveform or speech synthesis
FR2441214A1 (fr) * 1978-11-13 1980-06-06 Labo Cent Telecommunicat Additionneur numerique
FR2447646A1 (fr) * 1979-01-29 1980-08-22 Materiel Telephonique Filtre numerique transversal pour traitement en temps partage sur plusieurs canaux
JPS56147260A (en) * 1980-04-18 1981-11-16 Nec Corp Lsi for digital signal processing
NL8005506A (nl) * 1980-10-06 1982-05-03 Philips Nv Inrichting voor het uitvoeren van een matnematische operatie en enkele toepassingen van deze inrichting.
US4443859A (en) * 1981-07-06 1984-04-17 Texas Instruments Incorporated Speech analysis circuits using an inverse lattice network
US4449194A (en) * 1981-09-25 1984-05-15 Motorola Inc. Multiple point, discrete cosine processor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141510A (en) * 1981-02-26 1982-09-01 Mazda Motor Corp Display device for car
JPS57142054A (en) * 1981-02-27 1982-09-02 Nec Corp Dispatching telephone system

Also Published As

Publication number Publication date
EP0101318B1 (en) 1987-10-28
EP0101318A3 (en) 1984-12-27
US4611305A (en) 1986-09-09
ATE30484T1 (de) 1987-11-15
JPS5932216A (ja) 1984-02-21
EP0101318A2 (en) 1984-02-22
CA1196105A (en) 1985-10-29
DE3374236D1 (en) 1987-12-03

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