JPH0363813B2 - - Google Patents

Info

Publication number
JPH0363813B2
JPH0363813B2 JP59200109A JP20010984A JPH0363813B2 JP H0363813 B2 JPH0363813 B2 JP H0363813B2 JP 59200109 A JP59200109 A JP 59200109A JP 20010984 A JP20010984 A JP 20010984A JP H0363813 B2 JPH0363813 B2 JP H0363813B2
Authority
JP
Japan
Prior art keywords
chip
wiring pattern
substrate
coating film
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59200109A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6178132A (ja
Inventor
Takeshi Myagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP59200109A priority Critical patent/JPS6178132A/ja
Publication of JPS6178132A publication Critical patent/JPS6178132A/ja
Publication of JPH0363813B2 publication Critical patent/JPH0363813B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W70/093—
    • H10W70/60—
    • H10W70/6523—
    • H10W70/654—
    • H10W90/00—

Landscapes

  • Wire Bonding (AREA)
JP59200109A 1984-09-25 1984-09-25 集積回路装置 Granted JPS6178132A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59200109A JPS6178132A (ja) 1984-09-25 1984-09-25 集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59200109A JPS6178132A (ja) 1984-09-25 1984-09-25 集積回路装置

Publications (2)

Publication Number Publication Date
JPS6178132A JPS6178132A (ja) 1986-04-21
JPH0363813B2 true JPH0363813B2 (cg-RX-API-DMAC10.html) 1991-10-02

Family

ID=16418975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59200109A Granted JPS6178132A (ja) 1984-09-25 1984-09-25 集積回路装置

Country Status (1)

Country Link
JP (1) JPS6178132A (cg-RX-API-DMAC10.html)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100784388B1 (ko) * 2006-11-14 2007-12-11 삼성전자주식회사 반도체 패키지 및 제조방법
US7843046B2 (en) * 2008-02-19 2010-11-30 Vertical Circuits, Inc. Flat leadless packages and stacked leadless package assemblies
US9082438B2 (en) 2008-12-02 2015-07-14 Panasonic Corporation Three-dimensional structure for wiring formation
US8482137B2 (en) 2009-01-27 2013-07-09 Panasonic Corporation Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same
US9070393B2 (en) 2009-01-27 2015-06-30 Panasonic Corporation Three-dimensional structure in which wiring is provided on its surface

Also Published As

Publication number Publication date
JPS6178132A (ja) 1986-04-21

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