JPH0350467B2 - - Google Patents

Info

Publication number
JPH0350467B2
JPH0350467B2 JP6566685A JP6566685A JPH0350467B2 JP H0350467 B2 JPH0350467 B2 JP H0350467B2 JP 6566685 A JP6566685 A JP 6566685A JP 6566685 A JP6566685 A JP 6566685A JP H0350467 B2 JPH0350467 B2 JP H0350467B2
Authority
JP
Japan
Prior art keywords
output
pulse
signal
latch circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6566685A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61224739A (ja
Inventor
Koji Nishizaki
Masayuki Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6566685A priority Critical patent/JPS61224739A/ja
Publication of JPS61224739A publication Critical patent/JPS61224739A/ja
Publication of JPH0350467B2 publication Critical patent/JPH0350467B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/07Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/073Bit stuffing, e.g. PDH

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
JP6566685A 1985-03-29 1985-03-29 パルススタッフ同期装置 Granted JPS61224739A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6566685A JPS61224739A (ja) 1985-03-29 1985-03-29 パルススタッフ同期装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6566685A JPS61224739A (ja) 1985-03-29 1985-03-29 パルススタッフ同期装置

Publications (2)

Publication Number Publication Date
JPS61224739A JPS61224739A (ja) 1986-10-06
JPH0350467B2 true JPH0350467B2 (enrdf_load_stackoverflow) 1991-08-01

Family

ID=13293543

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6566685A Granted JPS61224739A (ja) 1985-03-29 1985-03-29 パルススタッフ同期装置

Country Status (1)

Country Link
JP (1) JPS61224739A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01180142A (ja) * 1988-01-12 1989-07-18 Fujitsu Ltd 同期式位相比較回路

Also Published As

Publication number Publication date
JPS61224739A (ja) 1986-10-06

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