JPH0321854U - - Google Patents
Info
- Publication number
- JPH0321854U JPH0321854U JP8203489U JP8203489U JPH0321854U JP H0321854 U JPH0321854 U JP H0321854U JP 8203489 U JP8203489 U JP 8203489U JP 8203489 U JP8203489 U JP 8203489U JP H0321854 U JPH0321854 U JP H0321854U
- Authority
- JP
- Japan
- Prior art keywords
- lead terminal
- semiconductor device
- semiconductor chip
- molded part
- synthetic resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 8
- 229920003002 synthetic resin Polymers 0.000 claims 1
- 239000000057 synthetic resin Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図〜第4図は本考案の実施例を示し、第1
図はダイオードの縦断正面図、第2図は第1図の
底面図、第3図はトランジスタの縦断正面図、第
4図は第3図の底面図、第5図は従来の半導体装
置の縦断正面図である。 11,11′……半導体チツプ、12,12′
,12″,13,13′……リード端子、12a
,13a……内部リード端子部、12b,13b
……外部リード端子部、14,14′……モール
ド部。
図はダイオードの縦断正面図、第2図は第1図の
底面図、第3図はトランジスタの縦断正面図、第
4図は第3図の底面図、第5図は従来の半導体装
置の縦断正面図である。 11,11′……半導体チツプ、12,12′
,12″,13,13′……リード端子、12a
,13a……内部リード端子部、12b,13b
……外部リード端子部、14,14′……モール
ド部。
Claims (1)
- 半導体チツプに体して電気的に接続する少なく
とも左右一対のリード端子を、合成樹脂製のモー
ルド部内において内部リード端子部と、前記モー
ルド部の底面に沿つてモールド部の左右両側面よ
り突出する外部リード端子部とに屈曲して成る半
導体装置において、前記各リード端子における内
部リード端子部を、互いに重ね合せて、その間の
部分に前記半導体チツプを挿入し、該半導体チツ
プを前記各内部リード端子部に対して接続したこ
とを特徴とする合成樹脂封止型半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989082034U JP2512441Y2 (ja) | 1989-07-11 | 1989-07-11 | 合成樹脂封止型半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989082034U JP2512441Y2 (ja) | 1989-07-11 | 1989-07-11 | 合成樹脂封止型半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0321854U true JPH0321854U (ja) | 1991-03-05 |
JP2512441Y2 JP2512441Y2 (ja) | 1996-10-02 |
Family
ID=31628492
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989082034U Expired - Lifetime JP2512441Y2 (ja) | 1989-07-11 | 1989-07-11 | 合成樹脂封止型半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2512441Y2 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001031704A1 (fr) * | 1999-10-28 | 2001-05-03 | Rohm Co., Ltd. | Dispositif a semi-conducteurs |
JP2002217349A (ja) * | 2001-01-17 | 2002-08-02 | Rohm Co Ltd | 半導体装置の製造方法および半導体装置 |
JP2010212736A (ja) * | 1999-10-28 | 2010-09-24 | Rohm Co Ltd | 半導体装置 |
JP2014135324A (ja) * | 2013-01-08 | 2014-07-24 | Joek Kim | リード線が改良されたダイオードパッケージ及びその製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57176751A (en) * | 1981-04-22 | 1982-10-30 | Toshiba Corp | Semiconductor device |
JPS58216448A (ja) * | 1982-06-09 | 1983-12-16 | Hitachi Ltd | 半導体装置及びその製造方法 |
-
1989
- 1989-07-11 JP JP1989082034U patent/JP2512441Y2/ja not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57176751A (en) * | 1981-04-22 | 1982-10-30 | Toshiba Corp | Semiconductor device |
JPS58216448A (ja) * | 1982-06-09 | 1983-12-16 | Hitachi Ltd | 半導体装置及びその製造方法 |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001031704A1 (fr) * | 1999-10-28 | 2001-05-03 | Rohm Co., Ltd. | Dispositif a semi-conducteurs |
JP2001196518A (ja) * | 1999-10-28 | 2001-07-19 | Rohm Co Ltd | 半導体装置 |
JP2010212736A (ja) * | 1999-10-28 | 2010-09-24 | Rohm Co Ltd | 半導体装置 |
JP4651153B2 (ja) * | 1999-10-28 | 2011-03-16 | ローム株式会社 | 半導体装置 |
JP2002217349A (ja) * | 2001-01-17 | 2002-08-02 | Rohm Co Ltd | 半導体装置の製造方法および半導体装置 |
JP4494654B2 (ja) * | 2001-01-17 | 2010-06-30 | ローム株式会社 | 半導体装置の製造方法および半導体装置 |
JP2014135324A (ja) * | 2013-01-08 | 2014-07-24 | Joek Kim | リード線が改良されたダイオードパッケージ及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2512441Y2 (ja) | 1996-10-02 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |