JPH0312448U - - Google Patents

Info

Publication number
JPH0312448U
JPH0312448U JP7376089U JP7376089U JPH0312448U JP H0312448 U JPH0312448 U JP H0312448U JP 7376089 U JP7376089 U JP 7376089U JP 7376089 U JP7376089 U JP 7376089U JP H0312448 U JPH0312448 U JP H0312448U
Authority
JP
Japan
Prior art keywords
island
semiconductor chip
lead frame
fixed
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7376089U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7376089U priority Critical patent/JPH0312448U/ja
Publication of JPH0312448U publication Critical patent/JPH0312448U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例に係るリードフレー
ムおよび固着半導体チツプ、ならびにボンデイン
グ金線を示す部分平面図、第２図は第１図の一本
の内部リードの側面図、第３図は従来のリードフ
レームの平面図、第４図は従来のリードフレーム
のリードシヨートを説明するための部分平面図で
ある。 １……アイランド、２，３……内部リード、５
……フレーム、６……タイバー、７……半導体チ
ツプ、８……ボンデイング金線。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体チツプを固着するアイランドとこのアイ
    ランド周囲をとり囲むように配置された多数のリ
    ードとを有するリードフレームにおいて、前記ア
    イランドに固着された半導体チツプの電極と金属
    細線で接続される内部リード先端部が幅方向およ
    び厚さ方向にテーパー付けされていることを特徴
    とするリードフレーム。
JP7376089U 1989-06-22 1989-06-22 Pending JPH0312448U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7376089U JPH0312448U (ja) 1989-06-22 1989-06-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7376089U JPH0312448U (ja) 1989-06-22 1989-06-22

Publications (1)

Publication Number Publication Date
JPH0312448U true JPH0312448U (ja) 1991-02-07

Family

ID=31612851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7376089U Pending JPH0312448U (ja) 1989-06-22 1989-06-22

Country Status (1)

Country Link
JP (1) JPH0312448U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006196615A (ja) * 2005-01-12 2006-07-27 Sumitomo Metal Electronics Devices Inc 半導体素子搭載用基板
JP2009049072A (ja) * 2007-08-15 2009-03-05 Panasonic Corp リードフレーム、半導体装置、リードフレームの製造方法、および半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006196615A (ja) * 2005-01-12 2006-07-27 Sumitomo Metal Electronics Devices Inc 半導体素子搭載用基板
JP4523425B2 (ja) * 2005-01-12 2010-08-11 株式会社住友金属エレクトロデバイス 半導体素子搭載用基板
JP2009049072A (ja) * 2007-08-15 2009-03-05 Panasonic Corp リードフレーム、半導体装置、リードフレームの製造方法、および半導体装置の製造方法

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