JPH0474463U - - Google Patents
Info
- Publication number
- JPH0474463U JPH0474463U JP1990116824U JP11682490U JPH0474463U JP H0474463 U JPH0474463 U JP H0474463U JP 1990116824 U JP1990116824 U JP 1990116824U JP 11682490 U JP11682490 U JP 11682490U JP H0474463 U JPH0474463 U JP H0474463U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- chip mounted
- package
- electrically connected
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Wire Bonding (AREA)
Description
第１図は本考案の一実施例を示す模式的平面図
及び側面図、第２図は従来の半導体装置の一例を
示す模式的平面図である。 １，２……半導体チツプ、３……バンプ、４…
…パツド、５……金線。
及び側面図、第２図は従来の半導体装置の一例を
示す模式的平面図である。 １，２……半導体チツプ、３……バンプ、４…
…パツド、５……金線。
Claims (1)
- パツケージ上に搭載した第１の半導体チツプと
、前記第１の半導体チツプ上に搭載し且つ電気的
に接続した第２の半導体チツプとを有することを
特徴とする半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990116824U JPH0474463U (ja) | 1990-11-07 | 1990-11-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990116824U JPH0474463U (ja) | 1990-11-07 | 1990-11-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0474463U true JPH0474463U (ja) | 1992-06-30 |
Family
ID=31864667
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990116824U Pending JPH0474463U (ja) | 1990-11-07 | 1990-11-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0474463U (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006237280A (ja) * | 2005-02-25 | 2006-09-07 | Sony Corp | 半導体装置及びその製造方法 |
-
1990
- 1990-11-07 JP JP1990116824U patent/JPH0474463U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006237280A (ja) * | 2005-02-25 | 2006-09-07 | Sony Corp | 半導体装置及びその製造方法 |