JPH0311092B2 - - Google Patents

Info

Publication number
JPH0311092B2
JPH0311092B2 JP61219901A JP21990186A JPH0311092B2 JP H0311092 B2 JPH0311092 B2 JP H0311092B2 JP 61219901 A JP61219901 A JP 61219901A JP 21990186 A JP21990186 A JP 21990186A JP H0311092 B2 JPH0311092 B2 JP H0311092B2
Authority
JP
Japan
Prior art keywords
etching
polysilicon
silicon
doped
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61219901A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62106631A (ja
Inventor
Wangu Baootai
An Ooarienzo Uendei
Gurangu Reinhaado
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS62106631A publication Critical patent/JPS62106631A/ja
Publication of JPH0311092B2 publication Critical patent/JPH0311092B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P50/642
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3085Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
    • H10P50/692
    • H10P50/694

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
JP61219901A 1985-10-31 1986-09-19 選択性エツチング剤 Granted JPS62106631A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US793402 1985-10-31
US06/793,402 US4681657A (en) 1985-10-31 1985-10-31 Preferential chemical etch for doped silicon

Publications (2)

Publication Number Publication Date
JPS62106631A JPS62106631A (ja) 1987-05-18
JPH0311092B2 true JPH0311092B2 (enExample) 1991-02-15

Family

ID=25159844

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61219901A Granted JPS62106631A (ja) 1985-10-31 1986-09-19 選択性エツチング剤

Country Status (4)

Country Link
US (1) US4681657A (enExample)
EP (1) EP0224022B1 (enExample)
JP (1) JPS62106631A (enExample)
DE (1) DE3689032T2 (enExample)

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JPS63215041A (ja) * 1987-03-04 1988-09-07 Toshiba Corp 結晶欠陥評価用エツチング液
AU602114B2 (en) * 1987-09-08 1990-09-27 Ebara Solar, Inc. Method for texturing a silicon surface of any crystallographic orientation using an isotropic etch and photolithography and silicon crystals made thereby
GB8813891D0 (en) * 1988-06-11 1988-07-13 Micro Image Technology Ltd Solutions of perhalogenated compounds
JP2787788B2 (ja) * 1990-09-26 1998-08-20 インターナショナル・ビジネス・マシーンズ・コーポレーション 残留物除去方法
JP3077304B2 (ja) * 1991-10-09 2000-08-14 日産自動車株式会社 エッチング装置
DE4305297C2 (de) * 1993-02-20 1998-09-24 Telefunken Microelectron Strukturbeize für Halbleiter und deren Anwendung
KR0131179B1 (ko) * 1993-02-22 1998-04-14 슌뻬이 야마자끼 전자회로 제조프로세스
US5580800A (en) * 1993-03-22 1996-12-03 Semiconductor Energy Laboratory Co., Ltd. Method of patterning aluminum containing group IIIb Element
US5486804A (en) * 1993-12-03 1996-01-23 Hughes Aircraft Company Integrated magnetoresistive sensor fabrication method and apparatus
KR950019922A (ko) * 1993-12-28 1995-07-24 김주용 다결정실리콘 습식식각용액
WO1996015550A1 (en) * 1994-11-10 1996-05-23 Lawrence Semiconductor Research Laboratory, Inc. Silicon-germanium-carbon compositions and processes thereof
US6313048B1 (en) * 1997-03-03 2001-11-06 Micron Technology, Inc. Dilute cleaning composition and method for using same
US6514875B1 (en) 1997-04-28 2003-02-04 The Regents Of The University Of California Chemical method for producing smooth surfaces on silicon wafers
US6849557B1 (en) 1997-04-30 2005-02-01 Micron Technology, Inc. Undoped silicon dioxide as etch stop for selective etch of doped silicon dioxide
US6277758B1 (en) 1998-07-23 2001-08-21 Micron Technology, Inc. Method of etching doped silicon dioxide with selectivity to undoped silicon dioxide with a high density plasma etcher
US6833084B2 (en) * 1999-04-05 2004-12-21 Micron Technology, Inc. Etching compositions
US6790785B1 (en) * 2000-09-15 2004-09-14 The Board Of Trustees Of The University Of Illinois Metal-assisted chemical etch porous silicon formation method
WO2002103752A2 (en) 2000-11-27 2002-12-27 The Board Of Trustees Of The University Of Illinois Metal-assisted chemical etch to produce porous group iii-v materials
US6989108B2 (en) * 2001-08-30 2006-01-24 Micron Technology, Inc. Etchant gas composition
US6559058B1 (en) * 2002-01-31 2003-05-06 The Regents Of The University Of California Method of fabricating three-dimensional components using endpoint detection
US6770568B2 (en) * 2002-09-12 2004-08-03 Intel Corporation Selective etching using sonication
US6746967B2 (en) * 2002-09-30 2004-06-08 Intel Corporation Etching metal using sonication
US20040188387A1 (en) * 2003-03-25 2004-09-30 Brask Justin K. Removing silicon nano-crystals
DE10344351A1 (de) * 2003-09-24 2005-05-19 Infineon Technologies Ag Verfahren zum anisotropen Ätzen von Silizium
TWI236053B (en) * 2003-11-25 2005-07-11 Promos Technologies Inc Method of selectively etching HSG layer in deep trench capacitor fabrication
US7153734B2 (en) * 2003-12-29 2006-12-26 Intel Corporation CMOS device with metal and silicide gate electrodes and a method for making it
JP4442446B2 (ja) * 2005-01-27 2010-03-31 信越半導体株式会社 選択エッチング方法
EP1872413A1 (en) * 2005-04-14 2008-01-02 Renewable Energy Corporation ASA Surface passivation of silicon based wafers
US20070207622A1 (en) * 2006-02-23 2007-09-06 Micron Technology, Inc. Highly selective doped oxide etchant
US20070227578A1 (en) * 2006-03-31 2007-10-04 Applied Materials, Inc. Method for patterning a photovoltaic device comprising CIGS material using an etch process
NO20061668L (no) * 2006-04-12 2007-10-15 Renewable Energy Corp Solcelle og fremgangsmate for fremstilling av samme
US7563670B2 (en) * 2006-11-13 2009-07-21 International Business Machines Corporation Method for etching single-crystal semiconductor selective to amorphous/polycrystalline semiconductor and structure formed by same
US7762152B2 (en) * 2008-02-12 2010-07-27 Honeywell International Inc. Methods for accurately measuring the thickness of an epitaxial layer on a silicon wafer
RU2376676C1 (ru) * 2008-07-17 2009-12-20 Государственное Образовательное Учреждение Высшего Профессионального Образования "Дагестанский Государственный Технический Университет" (Дгту) Способ обработки кристаллов кремния
US8048807B2 (en) * 2008-09-05 2011-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for thinning a substrate
KR100997669B1 (ko) 2008-11-04 2010-12-02 엘지전자 주식회사 스크린 인쇄법을 이용한 실리콘 태양전지 및 그 제조방법
JP2014501031A (ja) 2010-10-22 2014-01-16 カリフォルニア インスティチュート オブ テクノロジー 低熱伝導率および熱電性エネルギー転換材料のためのナノメッシュのフォノン性構造
CN102815661A (zh) * 2011-06-07 2012-12-12 无锡华润华晶微电子有限公司 硅膜制备方法
US20130019918A1 (en) 2011-07-18 2013-01-24 The Regents Of The University Of Michigan Thermoelectric devices, systems and methods
CN102338758A (zh) * 2011-08-03 2012-02-01 上海华碧检测技术有限公司 一种双极型晶体管器件掺杂结构的pn结染色方法
WO2013109729A1 (en) 2012-01-17 2013-07-25 Silicium Energy, Inc. Systems and methods for forming thermoelectric devices
KR20130106151A (ko) * 2012-03-19 2013-09-27 에스케이하이닉스 주식회사 고종횡비 캐패시터 제조 방법
WO2013149205A1 (en) 2012-03-29 2013-10-03 California Institute Of Technology Phononic structures and related devices and methods
KR20150086466A (ko) 2012-08-17 2015-07-28 실리시움 에너지, 인크. 열전 디바이스 형성 시스템 및 형성 방법
WO2014070795A1 (en) * 2012-10-31 2014-05-08 Silicium Energy, Inc. Methods for forming thermoelectric elements
KR20170026323A (ko) 2014-03-25 2017-03-08 실리시움 에너지, 인크. 열전 디바이스들 및 시스템들
US11322361B2 (en) * 2014-06-10 2022-05-03 International Business Machines Corporation Selective etching of silicon wafer
US9378966B2 (en) * 2014-06-10 2016-06-28 International Business Machines Corporation Selective etching of silicon wafer
WO2017192738A1 (en) 2016-05-03 2017-11-09 Matrix Industries, Inc. Thermoelectric devices and systems
USD819627S1 (en) 2016-11-11 2018-06-05 Matrix Industries, Inc. Thermoelectric smartwatch
CN111106045A (zh) * 2019-12-31 2020-05-05 中芯集成电路(宁波)有限公司 半导体结构及其加工方法、刻蚀机

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JPS513474B1 (enExample) * 1970-06-25 1976-02-03
NL167277C (nl) * 1970-08-29 1981-11-16 Philips Nv Halfgeleiderinrichting met een plaatvorming half- geleiderlichaam met over althans een deel van de dikte van het halfgeleiderlichaam afgeschuinde randen, dat is voorzien van een metalen elektrode die een gelijkrichtende overgang vormt met het halfgeleider- lichaam en werkwijze ter vervaardiging van de halfgeleiderinrichting.
JPS5341142B2 (enExample) * 1972-09-08 1978-10-31
US3892606A (en) * 1973-06-28 1975-07-01 Ibm Method for forming silicon conductive layers utilizing differential etching rates
DE2359511C2 (de) * 1973-11-29 1987-03-05 Siemens AG, 1000 Berlin und 8000 München Verfahren zum lokalisierten Ätzen von Gräben in Siliciumkristallen
FR2294549A1 (fr) * 1974-12-09 1976-07-09 Radiotechnique Compelec Procede de realisation de dispositifs optoelectroniques
US3997381A (en) * 1975-01-10 1976-12-14 Intel Corporation Method of manufacture of an epitaxial semiconductor layer on an insulating substrate
US4029542A (en) * 1975-09-19 1977-06-14 Rca Corporation Method for sloping the sidewalls of multilayer P+ PN+ junction mesa structures
US4215174A (en) * 1978-03-24 1980-07-29 General Electric Company Insulating coating for transformer wires
US4372803A (en) * 1980-09-26 1983-02-08 The United States Of America As Represented By The Secretary Of The Navy Method for etch thinning silicon devices
US4345969A (en) * 1981-03-23 1982-08-24 Motorola, Inc. Metal etch solution and method
US4512875A (en) * 1983-05-02 1985-04-23 Union Carbide Corporation Cracking of crude oils with carbon-hydrogen fragmentation compounds over non-zeolitic catalysts
JPS6066825A (ja) * 1983-09-22 1985-04-17 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
EP0224022A3 (en) 1988-10-05
JPS62106631A (ja) 1987-05-18
DE3689032T2 (de) 1994-04-14
US4681657A (en) 1987-07-21
DE3689032D1 (de) 1993-10-21
EP0224022A2 (en) 1987-06-03
EP0224022B1 (en) 1993-09-15

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