JPH0288244U - - Google Patents
Info
- Publication number
- JPH0288244U JPH0288244U JP16756788U JP16756788U JPH0288244U JP H0288244 U JPH0288244 U JP H0288244U JP 16756788 U JP16756788 U JP 16756788U JP 16756788 U JP16756788 U JP 16756788U JP H0288244 U JPH0288244 U JP H0288244U
- Authority
- JP
- Japan
- Prior art keywords
- adhesive layer
- conductor circuit
- circuit part
- thin film
- metal thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012790 adhesive layer Substances 0.000 claims description 5
- 239000004020 conductor Substances 0.000 claims description 4
- 239000010410 layer Substances 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 2
- 239000010409 thin film Substances 0.000 claims description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
Description
第1図は本考案の絶縁性基板の1例を示す断面
図、第2図乃至第8図は、第1図の絶縁性基板の
製造方法を説明するための工程図である。
1,9……絶縁シート、2,8……接着剤層、
3……導体回路部、3a……導体回路本体、3b
,7……金属薄膜層、4……導電基材、5……レ
ジストマスク、6……めつき層、8……プリプレ
グ(接着剤層)。
FIG. 1 is a sectional view showing one example of the insulating substrate of the present invention, and FIGS. 2 to 8 are process diagrams for explaining the method of manufacturing the insulating substrate of FIG. 1. 1, 9... Insulating sheet, 2, 8... Adhesive layer,
3...Conductor circuit section, 3a...Conductor circuit main body, 3b
, 7... Metal thin film layer, 4... Conductive base material, 5... Resist mask, 6... Plating layer, 8... Prepreg (adhesive layer).
Claims (1)
て導体回路部が一体形成され、該導体回路部の接
着剤層側の表面は金属薄膜層で被覆され、また、
前記導体回路部の外側回路面は前記接着剤層の外
側表面とともに水平面を形成していることを特徴
とする高周波用基板。 A conductor circuit part is integrally formed on one or both sides of the insulating sheet via an adhesive layer, the surface of the conductor circuit part on the adhesive layer side is covered with a metal thin film layer, and
A high frequency board, wherein an outer circuit surface of the conductive circuit portion forms a horizontal surface together with an outer surface of the adhesive layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16756788U JPH0288244U (en) | 1988-12-27 | 1988-12-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16756788U JPH0288244U (en) | 1988-12-27 | 1988-12-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0288244U true JPH0288244U (en) | 1990-07-12 |
Family
ID=31455978
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16756788U Pending JPH0288244U (en) | 1988-12-27 | 1988-12-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0288244U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5731671A (en) * | 1980-07-30 | 1982-02-20 | Iwaki Seiyaku Kk | Preparation of homopiperazine derivative |
JPS6149473B2 (en) * | 1979-05-07 | 1986-10-29 | Kee Efu Shii Kk |
-
1988
- 1988-12-27 JP JP16756788U patent/JPH0288244U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6149473B2 (en) * | 1979-05-07 | 1986-10-29 | Kee Efu Shii Kk | |
JPS5731671A (en) * | 1980-07-30 | 1982-02-20 | Iwaki Seiyaku Kk | Preparation of homopiperazine derivative |