JPH0263575U

JPH0263575U -

Info

Publication number: JPH0263575U
Application number: JP14257188U
Authority: JP
Priority date: 1988-10-31
Filing date: 1988-10-31
Publication date: 1990-05-11

Description

[Brief explanation of drawings]

第１図は、この考案に係る転写プレートを用い
て形成した回路基板の第１実施例の断面図である
。第２図は、第１図に示すものを製造する第１実
施例の第１手順を示した断面図である。第３図は
、上記第１実施例の第２手順を示した断面図であ
る。第４図は、上記第１実施例の第３手順を示し
た断面図である。第５図は、上記第１実施例の第
４手順を示した断面図である。第６図は、この考
案に係る転写プレートを用いて形成した回路基板
の第２実施例の断面図である。１……基板、２……導体層、３……電極、２１
……粗化面、２２……粒体、４１……剥離層、Ａ
，Ａ′……回路基板。 FIG. 1 is a sectional view of a first embodiment of a circuit board formed using a transfer plate according to this invention. FIG. 2 is a sectional view showing the first procedure of the first embodiment for manufacturing the product shown in FIG. 1. FIG. 3 is a sectional view showing the second procedure of the first embodiment. FIG. 4 is a sectional view showing the third procedure of the first embodiment. FIG. 5 is a sectional view showing the fourth procedure of the first embodiment. FIG. 6 is a sectional view of a second embodiment of a circuit board formed using the transfer plate according to this invention. 1...Substrate, 2...Conductor layer, 3...Electrode, 21
... Roughened surface, 22 ... Granules, 41 ... Peeling layer, A
, A'...Circuit board.

Claims

[Scope of utility model registration request]

1. A transfer plate for forming a circuit board in which an electrode and a conductor layer are buried on the same plane, wherein the transfer plate has a release layer formed on its surface.