JPH0242402U - - Google Patents
Info
- Publication number
- JPH0242402U JPH0242402U JP12234588U JP12234588U JPH0242402U JP H0242402 U JPH0242402 U JP H0242402U JP 12234588 U JP12234588 U JP 12234588U JP 12234588 U JP12234588 U JP 12234588U JP H0242402 U JPH0242402 U JP H0242402U
- Authority
- JP
- Japan
- Prior art keywords
- conductor layer
- circuit board
- electrode
- planar circuit
- roughened
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Non-Insulated Conductors (AREA)
- Adjustable Resistors (AREA)
Description
第１図は、この考案に係る平面回路基板の第１
実施例の断面図である。第２図は、第１図に示す
ものを製造する第１実施例の第１手順を示した断
面図である。第３図は、上記第１実施例の第２手
順を示した断面図である。第４図は、上記第１実
施例の第３手順を示した断面図である。第５図は
、上記第１実施例の第４手順を示した断面図であ
る。第６図は、この考案に係る平面回路基板の第
２実施例の断面図である。
１……基板、２……導体層、３……電極、２１
……粗化面、２２……粒体、Ａ，Ａ′……平面回
路基板。
FIG. 1 shows the first planar circuit board according to this invention.
It is a sectional view of an example. FIG. 2 is a sectional view showing the first procedure of the first embodiment for manufacturing the product shown in FIG. 1. FIG. 3 is a sectional view showing the second procedure of the first embodiment. FIG. 4 is a sectional view showing the third procedure of the first embodiment. FIG. 5 is a sectional view showing the fourth procedure of the first embodiment. FIG. 6 is a sectional view of a second embodiment of the flat circuit board according to the invention. 1...Substrate, 2...Conductor layer, 3...Electrode, 21
...Roughened surface, 22...Particles, A, A'...Planar circuit board.
Claims (1)
路基板に於いて、前記導体層の非露出面を粗化し
たことを特徴とする平面回路基板。 1. A planar circuit board in which an electrode and a conductor layer are buried on the same plane, the non-exposed surface of the conductor layer being roughened.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12234588U JPH0242402U (en) | 1988-09-19 | 1988-09-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12234588U JPH0242402U (en) | 1988-09-19 | 1988-09-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0242402U true JPH0242402U (en) | 1990-03-23 |
Family
ID=31370188
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12234588U Pending JPH0242402U (en) | 1988-09-19 | 1988-09-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0242402U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5398096A (en) * | 1977-02-08 | 1978-08-26 | Nec Corp | Production of thin film metal resistor |
| JPS6114704A (en) * | 1984-06-29 | 1986-01-22 | ナイルス部品株式会社 | Method of producing slide resistor |
-
1988
- 1988-09-19 JP JP12234588U patent/JPH0242402U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5398096A (en) * | 1977-02-08 | 1978-08-26 | Nec Corp | Production of thin film metal resistor |
| JPS6114704A (en) * | 1984-06-29 | 1986-01-22 | ナイルス部品株式会社 | Method of producing slide resistor |